Page 1 Rabbit 2000 /3000 Microprocessor Instruction Reference Manual 019–0098 F • 040114 This manual (or an even more up-to-date revision) is available for free download at the Rabbit website: www.rabbitsemiconductor.com...
Page 2 Rabbit 2000/3000 Microprocessor...
Page 3: Table Of Contents
Table of Contents 1. Alphabetical Listing of Instructions ........1 2.
Page 4 Rabbit 2000 Microprocessor...
Page 5: Alphabetical Listing Of Instructions
1. Alphabetical Listing of Instructions ......14 ........39 ......60 ADC A,n DEC IX LCALL x,mn ......15 ........39 ......68 ADC A,r DEC IY LD A,EIR ......13 ........40 ......68 ADC A,(HL) DEC r LD A,IIR ......13 .........41 ......69 ADC A,(IX+d) DEC ss LD A,XPC ......13 ......38 ......67...
Page 6 OR HL,DE XOR (HL) ......122 RR (IY+d) ......101 .......150 OR IX,DE XOR (IX+d) ........128 RRC r ......101 .......150 OR IY,DE XOR (IY+d) ......127 RRC (HL) ........102 OR n ......127 RRC (IX+d) ........102 OR r ......127 RRC (IY+d) Rabbit 2000/3000 Microprocessor...
Page 7: Instructions Listed By Group
2. Instructions Listed by Group A. Load Immediate Data LD HL,(SP+n) ......75 LD IX,(SP+n) ......78 LD dd,mn .
Page 8 AND IY,DE ......25 BIT b,(IY+d) ......28 Rabbit 2000/3000 Microprocessor...
Page 9 BIT b,r ........29 SLA r ........139 RES b,(HL) .
Page 10 RETI ........114 U. Rabbit 3000A Instructions IDET .
Page 11: Document Conventions
The number of clocks instructions take follows a general patern. There are several Rabbit instructions that do not adhere to this pattern. Some instructions take more clocks and some have been enhanced to take fewer clocks.
Page 12 LV flag contains logical check result LV flag set on arithmetic overflow result LV flag is cleared LV flag is affected • • Carry flag is affected Carry flag is not affected Carry flag is cleared Carry flag is set Rabbit 2000/3000 Microprocessor...
Page 13 Document Symbols Key Table 5: Symbols Rabbit Z180 Meaning Bit select (000 = bit 0, 001 = bit 1, 010 = bit 2, 011 = bit 3, 100 = bit 4, 101 = bit 5, 110 = bit 6, 111 = bit 7) Condition code select (00 = NZ, 01 = Z, 10 = NC, 11 = C) 8-bit signed displacement.
Page 14 L/V=0 For arithmentic operations, No Overflow L/V=1 For logic operations, Logic One (one or more of the four most signif- icant bits of the result are one) L/V=1 For arithmentic operations, Overflow Rabbit 2000/3000 Microprocessor...
Page 15: Processor Registers
4. Processor Registers Logical/ Sign Zero Carry Overflow General Purpose Alternate Registers Accumulator Accumulator Flags Flags 16-bit Accumulator 16-bit Accumulator Index Register Interrupt Priority Index Register Extension of Program Counter Stack Pointer External Interrupt Program Counter Internal Interrupt Instruction Reference Manual...
Page 16 Rabbit 2000/3000 Microprocessor...
Page 17: Opcode Descriptions
5. OpCode Descriptions ADC A,(HL) ADC A,(IX+d) ADC A,(IY+d) Opcode Instruction Clocks Operation ADC A,(HL) 5 (2,1,2) A = A + (HL) + CF DD 8E d ADC A,(IX+d) 9 (2,2,2,1,2) A = A + (IX+d) + CF FD 8E d ADC A,(IY+d) 9 (2,2,2,1,2) A = A + (IY+d) + CF...
Page 18 A = A + + CF Flags ALTD • • • • • Description The 8-bit constant n is summed with the C flag and with the data in A. The sum is then stored in A. Rabbit 2000/3000 Microprocessor...
Page 19 ADC A,r Opcode Instruction Clocks Operation —— ADC A,r A = A + r + CF ADC A,A A = A + A + CF ADC A,B A = A + B + CF ADC A,C A = A + C + CF ADC A,D A = A + D + CF ADC A,E...
Page 20: Adc Hl,Ss
Flags ALTD • • • • • Description The data in HL is summed with the C flag and with the data in ss (any of BC, DE, HL, or SP). The result is stored in HL. Rabbit 2000/3000 Microprocessor...
Page 21: Add A,(Hl)
ADD A,(HL) ADD A,(IX+d) ADD A,(IY+d) Opcode Instruction Clocks Operation ADD A,(HL) 5 (2,1,2) A = A + (HL) 9 (2,2,2,1,2) DD 86 ADD A,(IX+ A = A + (IX+ 9 (2,2,2,1,2) FD 86 ADD A,(IY+ A = A + (IY+ Flags ALTD •...
Page 22 Opcode Instruction Clocks Operation 4 (2,2) ADD A, A = A + Flags ALTD • • • • • Description The data in A is summed with the 8-bit constant n. The result is stored in A. Rabbit 2000/3000 Microprocessor...
Page 23 ADD A,r Opcode Instruction Clocks Operation —— ADD A,r A = A + r ADD A,A A = A + A ADD A,B A = A + B ADD A,C A = A + C ADD A,D A = A + D ADD A,E A = A + E ADD A,H...
Page 24: Add Hl,Ss
ADD HL,SP HL = HL + SP Flags ALTD • • • Description The data in HL is summed with the data in the ss (any of BC, DE, HL, or SP). The result is stored in HL. Rabbit 2000/3000 Microprocessor...
Page 25: Add Ix,Xx
ADD IX, ADD IY, Opcode Instruction Clocks Operation —— 4 (2,2) ADD IX, IX = IX + DD 09 4 (2,2) ADD IX,BC IX = IX + BC DD 19 4 (2,2) ADD IX,DE IX = IX + DE DD 29 4 (2,2) ADD IX,IX IX = IX + IX...
Page 26: Add Sp,D
Opcode Instruction Clocks Operation 4 (2,2) ADD SP, SP = SP + Flags ALTD • • Description The data in the Stack Pointer register (SP) is summed with the 7-bit signed displacement d, and then stored in Rabbit 2000/3000 Microprocessor...
Page 27: Altd
ALTD Opcode Instruction Clocks Operation ALTD [Sets alternate register destination for following instruction.] Flags ALTD Description This is an instruction prefix. Causes the instruction immediately following to affect the alternate flags, or use the alternate registers for the destination of the data, or both. For some instructions ALTD causes special alternate register uses, unique to that instruction.
Page 28: And (Hl)
If the byte in A contains the value 1011 1100 and the byte at memory location HL contains the value 1101 0101, then the execution of the instruction: AND (HL) would result in the byte in A becoming 1001 0100. Rabbit 2000/3000 Microprocessor...
Page 29: And Hl,De
AND HL,DE Opcode Instruction Clocks Operation AND HL,DE HL = HL & DE Flags ALTD • • • • Description Performs a logical AND operation between the word in HL and the word in DE. The relative bits of each byte are compared (i.e., bit 0 of both bytes are compared, bit 1 of both bytes are compared, etc.).
Page 30 (i.e., bit 0 of both bytes are compared, bit 1 of both bytes are compared, etc.). The associ- ated bit in the result byte is set only if both the compared bits are set. The result is stored in A. Rabbit 2000/3000 Microprocessor...
Page 31 AND r Opcode Instruction Clocks Operation —— AND r A = A & r AND A A = A & A AND B A = A & B AND C A = A & C AND D A = A & D AND E A = A &...
Page 32: Bit B,(Hl)
IX plus a displacement value d, or • the sum of data in IY plus a displacement value d. The Z flag is set if the tested bit is 0, reset the bit is 1. BIT b,(HL) is a privileged instruction. Rabbit 2000/3000 Microprocessor...
Page 33 BIT b,r Opcode Instruction Clocks Operation BIT b,r 4(2,2) r & bit CB (0) CB (1) CB (2) CB (3) CB (4) CB (5) CB (6) CB (7) Flags ALTD • • Description Tests bit b (any of the bits 0, 1, 2, 3, 4, 5, 6, or 7) of the byte in r (any of the registers A, B, C, D, E, H, or L). The Z flag is set if the tested bit is 0, reset if the bit is 1.
Page 34 BOOL HL Opcode Instruction Clocks Operation BOOL HL If (HL != 0) HL = 1 Flags ALTD • • • • Description If the data in HL does not equal zero, then it is set to 1. Rabbit 2000/3000 Microprocessor...
Page 35 BOOL IX BOOL IY Opcode Instruction Clocks Operation DD CC BOOL IX 4 (2,2) If (IX != 0) IX = 1 FD CC BOOL IY 4 (2,2) If (IY != 0) IY = 1 Flags ALTD • • • Description If the data in IX or IY does not equal zero, then that register is set to 1.
Page 36 PC is pushed first, then the low-order byte. PC is then loaded with mn,16-bit address of the first instruction of the subroutine. SP is updated to reflect the two bytes pushed onto the stack. The Dynamic C assembler recognizes CALL label, where mn is coded as a label. Rabbit 2000/3000 Microprocessor...
Page 37 Opcode Instruction Clocks Operation CF = ~CF Flags ALTD • • Description The C flag is inverted: If it is set, it becomes cleared. If it is not set, it becomes set. Instruction Reference Manual...
Page 38: Cp (Ix+D)
(A in this case). For example, if A contains 0x80 and you're comparing it to 0x01 the overflow flag will be set. This operation does not affect the data in A. Rabbit 2000/3000 Microprocessor...
Page 39 CP n Opcode Instruction Clocks Operation FE n CP n 4 (2,2) A - n Flags ALTD • • • • Description Compares the data in A with an 8-bit constant n. This compare is accomplished by subtracting n from A. The result is: A <...
Page 40 (A in this case). For example if A contains 0x80 and you're comparing it to 0x01 the overflow flag will be set. This operation does not affect the data in A. Rabbit 2000/3000 Microprocessor...
Page 41 Opcode Instruction Clocks Operation A = ~A Flags ALTD • Description The data in A is inverted (one’s complement). Example If the data in A is 1100 0101, after the instruction CPL A will contain 0011 1010. Instruction Reference Manual...
Page 42: Dec (Hl)
• • • • • Description Decrements the byte whose address is: • in HL, or • the data in IX plus a displacement value d, or • the data in IY plus a displacement value d. Rabbit 2000/3000 Microprocessor...
Page 43 DEC IX DEC IY Opcode Instruction Clocks Operation DD 2B DEC IX 4 (2,2) IX = IX - 1 FD 2B DEC IY 4(2,2) IY = IY - 1 Flags ALTD Description Decrements the data in IX or IY. Instruction Reference Manual...
Page 44 DEC H H = H - 1 DEC L L = L - 1 Flags ALTD • • • • Description Decrements the data in r (any of the registers A, B, C, D, E, H, or L). Rabbit 2000/3000 Microprocessor...
Page 45 DEC ss Opcode Instruction Clocks Operation —— DEC ss ss = ss - 1 DEC BC BC = BC - 1 DEC DE DE = DE - 1 DEC HL HL = HL - 1 DEC SP SP = SP - 1 Flags ALTD •...
Page 46 B does not equal 0, it adds the 8 bit signed constant e to PC. 2 is subtracted from the value e so the instruction jumps from the current instruction and not the following instruction. Rabbit 2000/3000 Microprocessor...
Page 47: Ex (Sp),Hl
EX (SP),HL Opcode Instruction Clocks Operation H <−> (SP+1); L <−> (SP) ED 54 EX (SP),HL 15 (2,2,1,2,2,3,3) Flags ALTD • Description Exchanges the byte in H with the data whose address is the data in SP plus 1; and exchanges the byte in L with the data whose address is the data in SP.
Page 48: Ex (Sp),Ix
EX (SP),IY exchanges the high order byte of IY with the data whose address is 1 plus the data in the Stack Pointer register, and exchanges the low order byte of IY with the data whose address is the data in the Stack Pointer register. Rabbit 2000/3000 Microprocessor...
Page 49: Ex Af,Af
EX AF,AF' Opcode Instruction Clocks Operation AF <−> AF' EX AF,AF' Flags ALTD Description Exchanges the data in AF with the data in the alternate register AF'. Instruction Reference Manual...
Page 50: Ex De,Hl
The Dynamic C assembler recognizes the following instructions, which are based on a combination of ALTD and the above exchange operations: • EX DE’,HL’ ; equivalent to ALTD EX DE’,HL • EX DE,HL’ ; equivalent to ALTD EX DE’,HL’ Rabbit 2000/3000 Microprocessor...
Page 51 Opcode Instruction Clocks Operation BC <−> BC'; DE <−> DE'; HL <−> HL' Flags ALTD Description Exchanges the data in BC, DE, and HL, with the data in their respective alternate registers BC', DE', and HL'. Instruction Reference Manual...
Page 52: Idet
Note that IDET has the same opcode value as LD E,E, and actually executes that opcode as well as the behav- ior described above. If IDET is prefixed by ALTD, the opcode LD E’,E is executed and the special System/ User mode behavior does not occur. This instruction is implemented in the Rabbit 3000A. Rabbit 2000/3000 Microprocessor...
Page 53: Inc (Hl)
INC (HL) INC (IX+d) INC (IY+d) Opcode Instruction Clocks Operation INC (HL) 8 (2,1,2,3) (HL) = (HL) + 1 DD 34 d INC (IX+d) 12 (2,2,2,1,2,3) (IX + d) = (IX + d) + 1 FD 34 d INC (IY+d) 12 (2,2,2,1,2,3) (IY + d) = (IY + d) + 1 Flags...
Page 54 4 (2,2) IX = IX + 1 FD 23 INC IY 4 (2,2) IY = IY + 1 Flags ALTD Description • INC IX increments the data in IX. • INC IY increments the data in IY. Rabbit 2000/3000 Microprocessor...
Page 55 INC r Opcode Instruction Clocks Operation —— INC r r = r + 1 INC A A = A + 1 INC B B = B + 1 INC C C = C + 1 INC D D = D + 1 INC E E = E + 1 INC H...
Page 56 INC DE DE = DE + 1 INC HL HL = HL + 1 INC SP SP = SP + 1 Flags ALTD • Description Increments the data in ss (any of BC, DE, HL, or SP). Rabbit 2000/3000 Microprocessor...
Page 57 I/O operations and fifteen wait states are added for I/O accesses. WARNING: If an I/O prefixed instruction is immediately followed by one of these 12 special one byte memory access instructions, a bug in the Rabbit 2000 causes I/O access to occur instead of memory access: ADC A,(HL)
Page 58: Ipset
Only interrupts of priority 2 and 3 take place after execution of current non privileged instruction. Only interrupts of priority 3 take place after execution of current non privileged instruction. All interrupts are suppressed (except the RST instruction). Rabbit 2000/3000 Microprocessor...
Page 59: Ipres
IPRES Opcode Instruction Clocks Operation ED 5D IPRES 4 (2,2) IP = {IP[1:0], IP[7:2]} Flags ALTD Description The IPRES instruction rotates the contents of the Interrupt Priority Register 2 bits to the right, replacing the current priority with the previous priority. It is impossible to interrupt during the execution of this instruction. This instruction is privileged.
Page 60 JP (IY): The data in IY is loaded into PC. Thus the address of the next instruction fetched is the data in IY. • JP mn: The 16-bit constant mn is loaded into PC. Thus the address of the next instruction fetched is mn. This instruction recognizes labels when used in the Dynamic C assembler. Rabbit 2000/3000 Microprocessor...
Page 61 JP f,mn Opcode Instruction Clocks Operation —— JP f,mn 7 (2,2,2,1) if {f} PC = mn C2 n m JP NZ,mn 7 (2,2,2,1) if {NZ} PC = mn CA n m JP Z,mn 7 (2,2,2,1) if {Z} PC = mn D2 n m JP NC,mn 7 (2,2,2,1)
Page 62 Since the instruction takes two increments of the PC to complete, two is subtracted from the displacement value so that the displacement takes place from the instruction opcode. This instruction recognizes labels when used in the Dynamic C assembler. Rabbit 2000/3000 Microprocessor...
Page 63 JR e Opcode Instruction Clocks Operation 18 e-2 JR e 5 (2,2,1) PC = PC + e Flags ALTD Description Adds a signed constant e to PC. Since the instruction takes two increments of PC to complete, two is subtracted from the displacement value so that the displacement takes place from the instruction opcode.
Page 64: Lcall X,Mn
The Dynamic C assembler recognizes several other forms of this instruction. LCALL label LCALL x,label LCALL x:label LCALL x:mn The parameter label is a user defined label. The colon is equivalent to the comma as a delimiter. Rabbit 2000/3000 Microprocessor...
Page 65: Ld (Bc),A
LD (BC),A LD (DE),A LD (HL),n LD (HL),r Opcode Instruction Clocks Operation LD (BC),A 7 (2,2,3) (BC) = A LD (DE),A 7 (2,2,3) (DE) = A 36 n LD (HL),n 7 (2,2,3) (HL) = n —— LD (HL),r 6 (2,1,3) (HL) = r LD (HL),A 6 (2,1,3)
Page 66: Ld (Hl+D),Hl
Loads the data in L into the memory location whose address is the sum of the data in HL and a displacement value d. Then, loads the data in H into the memory location whose address is the sum of the data in HL and a displacement value d plus 1. Rabbit 2000/3000 Microprocessor...
Page 67: Ld (Ix+D),R
LD (IX+d),HL LD (IX+d),n LD (IX+d),r Opcode Instruction Clocks Operation F4 d LD (IX+d),HL 11 (2,2,1,3,3) (IX + d) = L; (IX + d + 1) = H DD 36 d n LD (IX+d),n 11 (2,2,2,2,3) (IX + d) = n ——...
Page 68: Ld (Iy+D),Hl
LD (IY+d),r: Loads the data in r (any of the registers A, B, C, D, E, H, or L) into the mem- ory location whose address is the sum of the data in IY plus a displacement value d. Rabbit 2000/3000 Microprocessor...
Page 69: Ld (Mn),A
LD (mn),A LD (mn),HL LD (mn),IX LD (mn),IY LD (mn),ss Opcode Instruction Clocks Operation 32 n m LD (mn),A (mn) = A 22 n m LD (mn),HL (mn) = L; (mn + 1) = H DD 22 n m LD (mn),IX (mn) = IX ;...
Page 70: Ld (Sp+N),Ix
SP and the displacement n. Then loads the high order byte of the data in IY into the memory location whose address is the sum of data in SP, the displacement n, and 1. Rabbit 2000/3000 Microprocessor...
Page 71: Ld A,(Mn)
LD A,(BC) LD A,(DE) LD A,(mn) Opcode Instruction Clocks Operation LD A,(BC) 6 (2,2,2) A = (BC) LD A,(DE) 6 (2,2,2) A = (DE) 3A n m LD A,(mn) 9 (2,2,2,1,2) A = (mn) Flags ALTD • • Description Loads A with the data whose address in memory is: •...
Page 72: Ld A,Eir
Most Significant Byte (MSB) of the Internal Peripheral Interrupt address. The value loaded in the IIR is concatenated with the appropriate Internal Peripheral address to form the 16- bit ISR starting address for that peripheral. Rabbit 2000/3000 Microprocessor...
Page 73: Ld A,Xpc
LD A,XPC Opcode Instruction Clocks Operation ED 77 LD A,XPC 4 (2,2) A = XPC Flags ALTD • Description Loads A with the data in XPC. This instruction is privileged. Instruction Reference Manual...
Page 74: Ld Dd,(Mn)
Loads the low-order byte of the dd (any of BC, DE, HL or SP) with the data at memory address mn. Then loads the high-order byte of register dd with data at memory address mn plus 1. Rabbit 2000/3000 Microprocessor...
Page 75: Ld Dd',Bc
LD dd',BC LD dd',DE Opcode Instruction Clocks Operation —— LD dd',BC 4 (2,2) dd' = BC ED 49 LD BC',BC 4 (2,2) BC' = BC ED 59 LD DE',BC 4 (2,2) DE' = BC ED 69 LD HL',BC 4 (2,2) HL' = BC ——...
Page 76: Ld Dd,Mn
21 n m LD HL,mn 6 (2,2,2) HL = mn 31 n m LD SP,mn 6 (2,2,2) SP = mn Flags ALTD • Description Loads dd (any of BC, DE, HL, or SP) with the 16-bit value mn. Rabbit 2000/3000 Microprocessor...
Page 77: Ld Eir,A
LD EIR,A LD IIR,A Opcode Instruction Clocks Operation ED 47 LD EIR,A 4 (2,2) EIR = A ED 4F LD IIR,A 4 (2,2) IIR = A Flags ALTD Description • LD EIR,A: Loads the External Interrupt Register, EIR, with the data in A. The EIR is used to specify the Most Significant Byte (MSB) of the External Interrupt address.
Page 78: Ld Hl,(Mn)
LD HL,(IY+d): Loads L with the data whose address is the data in IY plus a displacement d. Then loads H with the data whose address is the data in IY plus a displacement d plus 1. Rabbit 2000/3000 Microprocessor...
Page 79: Ld Hl,(Sp+N)
LD HL,(SP+n) Opcode Instruction Clocks Operation C4 n LD HL,(SP+n) 9 (2,2,1,2,2) L = (SP + n); H = (SP + n + 1) Flags ALTD • Description Loads L with the data whose address is the data in SP plus a displacement d. Then loads H with the data whose address is the data in SP plus a displacement d plus 1.
Page 80: Ld Hl,Ix
4 (2,2) HL = IX FD 7C LD HL,IY 4 (2,2) HL = IY Flags ALTD • Description • LD HL,IX: Loads HL with the data in IX. • LD HL,IY: Loads HL with the data in IY. Rabbit 2000/3000 Microprocessor...
Page 81: Ld Ix,(Mn)
LD IX,(mn) Opcode Instruction Clocks Operation DD 2A n m LD IX,(mn) = (mn); IX = (mn + 1) (low) (high) *Clocking: 13 (2,2,2,2,1,2,2) Flags ALTD • Description Loads the low order byte of IX with the data whose address is mn. Then loads the high order byte of IX with the data whose address is mn plus 1.
Page 82: Ld Ix,(Sp+N)
Loads the low order byte of IX with the data whose address is the data in the Stack Pointer, SP, plus a dis- placement n. Then loads the high order byte of IX with the data whose address is the data in the Stack Pointer register plus a displacement n plus 1. Rabbit 2000/3000 Microprocessor...
Page 83: Ld Ix,Mn
LD IX,HL LD IX,mn LD IY,HL LD IY,mn Opcode Instruction Clocks Operation DD 7D LD IX,HL 4 (2,2) IX = HL DD 21 n m LD IX,mn 8 (2,2,2,2) IX = mn FD 7D LD IY,HL 4 (2,2) IY = HL FD 21 n m LD IY,mn 8 (2,2,2,2)
Page 84: Ld Iy,(Mn)
(high) *Clocking: 13 (2,2,2,2,1,2,2) Flags ALTD • Description Loads the low order byte of IY with the data at the address mn and loads the high order byte of IY with the data at the address mn+1. Rabbit 2000/3000 Microprocessor...
Page 85: Ld Iy,(Sp+N)
LD IY,(SP+n) Opcode Instruction Clocks Operation FD C4 n LD IY,(SP+n) = (SP + n); IY = (SP + n + 1) (low) (high) *Clocking: 11 (2,2,2,1,2,2) Flags ALTD Description Loads the low order byte of IY with the data whose address is the data in the Stack Pointer register SP plus a displacement n.
Page 86: Ld R,(Hl)
Loads r (any of the registers A, B, C, D, E, H, or L) with the data whose address is: • the data in HL, or • the sum of the data in IX and a displacement d, or • the sum of the data in IY and a displacement d. Rabbit 2000/3000 Microprocessor...
Page 87 LD r,n Opcode Instruction Clocks Operation —— LD r,n 4 (2,2) r = n 3E n LD A,n 4 (2,2) A = n 06 n LD B,n 4 (2,2) B = n 0E n LD C,n 4 (2,2) C = n 16 n LD D,n 4 (2,2)
Page 88 = g Flags ALTD • Description Loads r (any of the registers A, B, C, D, E, H, or L) with the data in g (any of the registers A, B, C, D, E, H, or L). Rabbit 2000/3000 Microprocessor...
Page 89: Ld Sp,Iy
LD SP,HL LD SP,IX LD SP,IY Opcode Instruction Clocks Operation LD SP,HL SP = HL DD F9 LD SP,IX 4 (2,2) SP = IX FD F9 LD SP,IY 4 (2,2) SP = IY Flags ALTD Description Loads SP with the data in (a) HL, (b) the data in IX, or (c) the data in IY. These are privileged instructions. Instruction Reference Manual...
Page 90: Ld Xpc,A
LD XPC,A Opcode Instruction Clocks Operation ED 67 LD XPC,A 4 (2,2) XPC = A Flags ALTD Description Loads XPC with the data in A. This instruction is privileged. Rabbit 2000/3000 Microprocessor...
Page 91: Lddr
LDDR LDIR Opcode Instruction Clocks Operation ED A8 10 (2,2,1,2,3) (DE) = (HL); BC = BC - 1; DE = DE - 1; HL = HL - 1 ED B8 LDDR 6 + 7i (2,2,1,(2,3,2)i,1) repeat: (DE) = (HL); BC = BC - 1; DE = DE - 1;...
Page 92: Ldisr
Return from the interrupt is to the first byte of the instruction which is the I/O prefix byte if there is one. These instructions are implemented in the Rabbit 3000A. Rabbit 2000/3000 Microprocessor...
Page 93: Ldp (Hl),Hl
LDP (HL),HL LDP (IX),HL LDP (IY),HL Opcode Instruction Clocks Operation ED 64 LDP (HL),HL 12 (2,2,2,3,3) (HL) = L; (HL + 1) = H. (Addr[19:16] = A[3:0]) DD 64 LDP (IX),HL 12 (2,2,2,3,3) (IX) = L; (IX + 1) = H. (Addr[19:16] = A[3:0]) FD 64 LDP (IY),HL...
Page 94: Ldp (Mn),Hl
Thus, if you fetch or store at address 0xn,0xFFFF, you will get the bytes located at 0xn, 0xFFFF and 0xn,0x0000 instead of 0xn,0xFFFF and 0x(n+1),0x0000 as you might expect. Therefore, do not use LDP at any physical address ending in 0xFFFF. Rabbit 2000/3000 Microprocessor...
Page 95: Ldp Hl,(Hl)
LDP HL,(HL) LDP HL,(IX) LDP HL,(IY) Opcode Instruction Clocks Operation ED 6C LDP HL,(HL) 10 (2,2,2,2,2) L = (HL); H = (HL + 1). (Addr[19:16] = A[3:0]) DD 6C LDP HL,(IX) 10 (2,2,2,2,2) L = (IX); H = (IX + 1). (Addr[19:16] = A[3:0]) FD 6C LDP HL,(IY)
Page 96: Ldp Hl,(Mn)
Thus, if you fetch or store at address 0xn,0xFFFF, you will get the bytes located at 0xn, 0xFFFF and 0xn,0x0000 instead of 0xn,0xFFFF and 0x(n+1)0x0000 as you might expect. Therefore, do not use LDP at any physical address ending in 0xFFFF. Rabbit 2000/3000 Microprocessor...
Page 97: Ljp X,Mn
LJP x,mn Opcode Instruction Clocks Operation C7 n m x LJP x,mn 10 (2,2,2,2,2) XPC = x; PC = mn Flags ALTD Description This instruction is similar to the JP mn instruction in that it transfers program execution to the memory loca- tion specified by the 16-bit address, mn.
Page 98: Lret
SP and XPC is loaded with the data whose address is two plus the data in SP. Finally the value in SP is incremented by 3. Rabbit 2000/3000 Microprocessor...
Page 99: Lsddr
Interrupts can occur between different repeats, but not within an iteration. Return from the interrupt is to the first byte of the instruction which is the I/O prefix byte if there is one. These instructions are implemented for the Rabbit 3000A.
Page 100 ;HL|BC = 1, HL gets 0000h, BC gets 0001h In the above example, the 2’s complement of FFFFh is 0001h. LD BC, 0FFFFh ;BC gets -1 LD DE, 00001h ;DE gets 1 ;HL|BC = -1, HL gets FFFFh, BC gets FFFFh Rabbit 2000/3000 Microprocessor...
Page 101 Opcode Instruction Clocks Operation ED 44 4 (2,2) A = 0 - A Flags ALTD • • • • • Description Subtracts the value of the data in A from zero and stores the result in A. Instruction Reference Manual...
Page 102 Opcode Instruction Clocks Operation No operation Flags ALTD Description No operation is performed during this cycle. Rabbit 2000/3000 Microprocessor...
Page 103: Or (Ix+D)
OR (HL) OR (IX+d) OR (IY+d) Opcode Instruction Clocks Operation OR (HL) 5 (2,1,2) A = A | (HL) DD B6 d OR (IX+d) 9 (2,2,2,1,2) A = A | (IX+d) FD B6 d OR (IY+d) 9 (2,2,2,1,2) A = A | (IY+d) Flags ALTD •...
Page 104: Or Hl,De
(i.e., the bit 1 of both bytes are compared, the bit 2 of both bytes are compared, etc.) and the associated bit in the result byte is set if either of the compared bits is set. The result is stored in HL. Rabbit 2000/3000 Microprocessor...
Page 105: Or Ix,De
OR IX,DE OR IY,DE Opcode Instruction Clocks Operation DD EC OR IX,DE 4 (2,2) IX = IX | DE FD EC OR IY,DE 4 (2,2) IY = IY | DE Flags ALTD • • • Description • OR IX,DE: Performs a logical OR operation between the data in IX and the data in DE. The result is stored in IX •...
Page 106 The relative bits of each byte are compared (i.e., bit 1 of both bytes are compared, bit 2 of both bytes are com- pared, etc.) and the associated bit in the result byte is set if either of the compared bits is set. The result is stored in A. Rabbit 2000/3000 Microprocessor...
Page 107 POP IP POP IX POP IY Opcode Instruction Clocks Operation ED 7E POP IP 7 (2,2,1,2) IP = (SP); SP = SP + 1 DD E1 POP IX 9 (2,2,1,2,2) = (SP); IX = (SP + 1); (low) (high) SP = SP + 2 FD E1 POP IY 9 (2,2,1,2,2)
Page 108 SU = (SP); SP = SP + 1 Flags ALTD Description Loads the System/User Mode Register SU with the data at the memory location in SP, then increments the data in SP. This instruction is privileged and is implemented in the Rabbit 3000A. Instruction Reference Manual...
Page 109 POP zz Opcode Instruction Clocks Operation —— POP zz 7 (2,1,2,2) = (SP); zz = (SP + 1); (low) (high) SP = SP + 2 POP AF 7 (2,1,2,2) F = (SP); A = (SP + 1); SP = SP + 2 POP BC 7 (2,1,2,2) C = (SP);...
Page 110 Pointer, SP, with the high order byte of the data in IY, and loads the memory location with the address two less than the data in SP with the low order byte of the data in IY. Then SP is decre- mented twice. Rabbit 2000/3000 Microprocessor...
Page 111 Loads the location in memory whose address is 1 less than the data held in SP with the data in the System/ User Mode Register (SU) then decrements SP. This instruction is privileged and is implemented in the Rabbit 3000A. Instruction Reference Manual...
Page 112 (any of AF, BC, DE, or HL), and loads the memory location with the address two less than the data in SP with the low order byte of the data in zz. Then SP is decremented twice. Rabbit 2000/3000 Microprocessor...
Page 113: Rdmode
ED 7F RDMODE 4 (2,2) CF = SU[0] Flags ALTD Description The RDMODE instruction sets the C flag to the value of bit 0 of the System/User Mode Register (SU). This instruction is implemented in the Rabbit 3000A. Instruction Reference Manual...
Page 114: Res B,(Hl)
IX and a displacement d, or • the sum of the data in IY and a displacement d. The bit is reset by performing a logical AND between the selected bit and its complement. Rabbit 2000/3000 Microprocessor...
Page 115 RES b,r Opcode Instruction Clocks Operation RES b,r 4 (2,2) r & ~bit CB(0) CB(1) CB(2) CB(3) CB(4) CB(5) CB(6) CB(7) Flags ALTD • Description Resets bit b (any of the bits 0, 1, 2, 3, 4, 5, 6, or 7) of the data held in r (any of the register A, B, C, D, E, H, or The bit is reset by performing a logical AND between the selected bit and its complement.
Page 116 SP then loads the high order byte of PC with the data at the memory address immediately following the one held in SP. The data in SP is then incremented twice. Rabbit 2000/3000 Microprocessor...
Page 117 RET f Opcode Instruction Operation —— RET f If {f} PC = (SP); PC = (SP + 1); SP = SP + 2 (low) (high) RET NZ If {NZ} PC = (SP); PC = (SP + 1); SP = SP + 2 (low) (high) RET Z...
Page 118: Reti
PC with the data whose address is 1 higher than the data in SP and loads the high order byte of PC with the data whose address is two higher than the data in SP. The data in SP is then incremented three times. This is a privileged instruction. Rabbit 2000/3000 Microprocessor...
Page 119: Rl (Ix+D)
RL (HL) RL (IX+d) RL (IY+d) Opcode Instruction Clocks Operation CB 16 RL (HL) 10 (2,2,1,2,3) {CF,(HL)} = {(HL),CF} DD CB d 16 RL (IX+d) 13 (2,2,2,2,2,3) {CF,(IX + d)} = {(IX + d),CF} FD CB d 16 RL (IY+d) 13 (2,2,2,2,2,3) {CF,(IY + d)} = {(IY + d),CF} Flags...
Page 120 (bit 0 moves to bit 1, etc.) while the C flag moves to bit 0 and bit 15 moves to the C flag. See figure below. Figure 2: Bit logic of the RL instruction. Rabbit 2000/3000 Microprocessor...
Page 121 RL r Opcode Instruction Clocks Operation —— RL r 4 (2,2) {CF,r} = {r,CF} CB 17 RL A 4 (2,2) {CF,A} = {A,CF} CB 10 RL B 4 (2,2) {CF,B} = {B,CF} CB 11 RL C 4 (2,2) {CF,C} = {C,CF} CB 12 RL D 4 (2,2)
Page 122 Rotates to the left with the C flag the contents of A. Each bit in the register moves to the next highest-order bit position (bit 0 moves to bit 1, etc.) while the C flag moves to bit 0 and bit 7 moves to the C flag. See Figure 1 on page 115. Rabbit 2000/3000 Microprocessor...
Page 123: Rlc (Hl)
RLC (HL) RLC (IX+d) RLC (IY+d) Opcode Instruction Operation CB 06 RLC (HL) (HL) = {(HL)[6,0],(HL)[7]}; CF = (HL)[7] DD CB d 06 RLC (IX+d) (IX + d) = {(IX + d)[6,0],(IX + d)[7]}; 13** CF = (IX+d)[7] FD CB d 06 RLC (IY+d) (IY + d) = {(IY + d)[6,0],(IY + d)[7]};...
Page 124 Rotates to the left the data in r (any of the register A, B, C, D, E, H, or L). Each bit in the register moves to the next highest-order bit position (bit 0 moves to bit 1, etc.) while bit 7 moves to both bit 0 and the C flag. See Figure 3 on page 119. Rabbit 2000/3000 Microprocessor...
Page 125: Rlca
RLCA Opcode Instruction Clocks Operation RLCA A = {A[6,0],A[7]}; CF = A[7] Flags ALTD • • • Description Rotates to the left the data in A. Each bit in the register moves to the next highest-order bit position (bit 0 moves to bit 1, etc.) while bit 7 moves to both bit 0 and the C flag.
Page 126: Rr (Ix+D)
Bit 0 moves to the C flag, bits 1 through 7 move to the next lowest-order bit position, and the C flag moves to bit 7. See figure below. Figure 4: The bit logic for the RR instruction. Rabbit 2000/3000 Microprocessor...
Page 127 RR DE RR HL Opcode Instruction Clocks Operation RR DE {DE,CF} = {CF,DE} RR HL {HL,CF} = {CF,HL} Flags ALTD • • • • • Description Rotates to the right with the C flag the data in DE or HL. Bit 0 moves to the C flag, bits 1 through 15 move to the next lowest-order bit position, and the C flag moves to bit 15 (see figure below).
Page 128 Rotates to the right with the C flag the data in IX or IY. Bit 0 moves to the C flag, bits 1 through 15 move to the next lowest-order bit position, and the C flag moves to bit 15. See Figure 5 on page 123. Rabbit 2000/3000 Microprocessor...
Page 129 RR r Opcode Instruction Clocks Operation —— RR r 4 (2,2) {r,CF} = {CF,r} CB 1F RR A 4 (2,2) {A,CF} = {CF,A} CB 18 RR B 4 (2,2) {B,CF} = {CF,B} CB 19 RR C 4 (2,2) {C,CF} = {CF,C} CB 1A RR D 4 (2,2)
Page 130 Rotates to the right with the C flag the data in A. Bit 0 moves to the C flag, bits 1 through 7 move to the next lowest-order bit position, and the C flag moves to bit 7. See Figure 4 on page 122. Rabbit 2000/3000 Microprocessor...
Page 131: Rrc (Hl)
RRC (HL) RRC (IX+d) RRC (IY+d) Opcode Instruction Clocks Operation CB 0E RRC (HL) 10 (2,2,1,2,3) (HL) = {(HL)[0],(HL)[7,1]}; CF = (HL)[0] DD CB d 0E RRC (IX+d) 13 (2,2,2,2,2,3) (IX + d) = {(IX + d)[0], (IX + d)[7,1]}; CF = (IX + d)[0] FD CB d 0E RRC (IY+d)
Page 132 Rotates to the right the data in r (any of the registers A, B, C, D, E, H, or L). Each bit in the register moves to the next lowest-order bit position (bit 7 moves to bit 6, etc.) while bit 0 moves to both bit 7 and the C flag. See Figure 6 on page 127. Rabbit 2000/3000 Microprocessor...
Page 133: Rrca
RRCA Opcode Instruction Clocks Operation RRCA A = {A[0],A[7,1]}; CF = A[0] Flags ALTD • • • Description Rotates to the right the data in A. Each bit in the register moves to the next lowest-order bit position (bit 7 moves to bit 6, etc.) while bit 0 moves to both bit 7 and the C flag.
Page 134 SP. The value in SP is then decremented twice. The PC is reset by loading it with the address to reset to v (any of the addresses 0020, 0030, 0040, 0050, or 0070). Rabbit 2000/3000 Microprocessor...
Page 135: Sbc (Ix+D)
SBC A,(HL) SBC (IX+d) SBC (IY+d) Opcode Instruction Clocks Operation SBC A,(HL) 5 (2,1,2) A = A - (HL) - CF DD 9E d SBC (IX+d) 9 (2,2,2,1,2) A = A - (IX + d) - CF FD 9E d SBC (IY+d) 9 (2,2,2,1,2) A = A - (IY + d) - CF...
Page 136 The C flag is set if A is less than the data being subtracted from it. • The C flag is cleared if A is greater than the data being subtracted from it. • The C flag is unchaged if A is equal to the data being subracted from it. Rabbit 2000/3000 Microprocessor...
Page 137: Sbc Hl,Ss
SBC HL,ss Opcode Instruction Clocks Operation —— SBC HL,ss 4 (2,2) HL = HL - ss - CF ED 42 SBC HL,BC 4 (2,2) HL = HL - BC - CF ED 52 SBC HL,DE 4 (2,2) HL = HL - DE - CF ED 62 SBC HL,HL 4 (2,2)
Page 138 Opcode Instruction Clocks Operation CF = 1 Flags ALTD • Description Sets the C flag. Rabbit 2000/3000 Microprocessor...
Page 139: Set B,(Hl)
SET b,(HL) SET b,(IX+d) SET b,(IY+d) Opcode Instruction Clocks Operation SET b,(HL) (HL) = (HL) | bit CB C6 SET bit 0,(HL) (HL) = (HL) | bit 0 CB CE SET bit 1,(HL) (HL) = (HL) | bit 1 CB D6 SET bit 2,(HL) (HL) = (HL) | bit 2 CB DE...
Page 140 Flags ALTD • Description Sets bit b (any of the bits 0, 1, 2, 3, 4, 5, 6, or 7) of the data in r (any of the registers A, B, C, D, E, H, or L). Rabbit 2000/3000 Microprocessor...
Page 141: Setusr
3 modes. SETUSR shifts the contents of SU 2 bits to the left, then sets bit 1 to 0 and bit 0 to 1, signifying user mode. This instruction is privileged and only implemented for the Rabbit 3000A. Instruction Reference Manual...
Page 142: Sla (Hl)
Bits 0 through 6 are each shifted to the next highest-order bit position (bit 0 moves to bit 1, etc.). Bit 7 is shifted to the C flag. Bit 0 is reset. See figure below. ‘0’ Figure 7: The bit logic of the SLA instruction. Rabbit 2000/3000 Microprocessor...
Page 143 SLA r Opcode Instruction Clocks Operation —— SLA r 4 (2,2) r = {r[6,0],0}; CF = r[7] CB 27 SLA A 4 (2,2) A = {A[6,0],0}; CF = A[7] CB 20 SLA B 4 (2,2) B = {B[6,0],0}; CF = B[7] CB 21 SLA C 4 (2,2)
Page 144: Sra (Hl)
Bits 7 through 1 are shifted to the next lowest-order bit position (bit 7 is shifted to bit 6, etc.). Bit 7 is also cop- ied to itself. Bit 0 is shifted to the C flag. See figure below. Figure 8: The bit logic of the SRA instruction. Rabbit 2000/3000 Microprocessor...
Page 145 SRA r Opcode Instruction Clocks Operation —— SRA r 4 (2,2) r = {r[7],r[7,1]}; CF = r[0] CB 2F SRA A 4 (2,2) A = {A[7],A[7,1]}; CF = A[0] CB 28 SRA B 4 (2,2) B = {B[7],B[7,1]}; CF = B[0] CB 29 SRA C 4 (2,2)
Page 146: Srl (Hl)
Each bit is shifted to the next lowest-order bit position (Bit 7 shifts to bit 6, etc.) Bit 0 shift to the C flag. Bit 7 is reset. See figure below. ‘0’ Figure 9: The bit logic of the SRL instruction. Rabbit 2000/3000 Microprocessor...
Page 147 SRL r Opcode Instruction Clocks Operation —— SRL r 4 (2,2) r = {0,r[7,1]}; CF = r[0] CB 3F SRL A 4 (2,2) A = {0,A[7,1]}; CF = A[0] CB 38 SRL B 4 (2,2) B = {0,B[7,1]}; CF = B[0] CB 39 SRL C 4 (2,2)
Page 148: Sub (Hl)
• the data in HL, or • the sum of the data in IX and a displacement d, or • the sum of the data in IY and a displacement d. The result is stored in A. Rabbit 2000/3000 Microprocessor...
Page 149 SUB n Opcode Instruction Clocks Operation D6 n SUB n 4 (2,2) A = A - n Flags ALTD • • • • • Description Subtracts from the data in A the 8-bit constant n. The result is stored in A. Instruction Reference Manual...
Page 150 A = A - L Flags ALTD • • • • • Description Subtracts from the data in A the data in r (any of the registers A, B, C, D, E, H, or L). The result is stored in A. Rabbit 2000/3000 Microprocessor...
Page 151: Sures
The SURES instruction rotates the contents of the System/User Mode Register SU 2 bits to the right, replac- ing the current processor mode with the previous mode. This instruction is privileged and only implemented for the Rabbit 3000A. Instruction Reference Manual...
Page 152: Syscall
1 less than the number in SP. Then the low-order byte of the PC is loaded into the memory location with the address two less than the number in SP. The value in SP is then decremented twice. This instruction is implemented in the Rabbit 3000A. Rabbit 2000/3000 Microprocessor...
Page 153 16 bits are stored in the alternate register DE’. If The data in IX, IY, and HL are then incremented, and the data in BC is decremented. The instruction then repeats until BC equals zero. Interrupts can occur between different repeats, but not within an iteration. These instructions are implemented in the Rabbit 3000A. Instruction Reference Manual...
Page 154: Xor (Hl)
If HL contains 0x4000 and the memory location 0x4000 contains the byte 1001 0101 and A contains the byte 0101 0011 then the execution of the instruction XOR (HL) would result in the byte in A becoming 1100 0110. Rabbit 2000/3000 Microprocessor...
Page 155 XOR n Opcode Instruction Clocks Operation EE n XOR n 4 (2,2) A = [A & ~n] | [~A & n] Flags ALTD • • • • Description Performs an exclusive OR operation between the byte in A and the 8-bit constant n. The corresponding bits of each byte are compared (i.e., bit 0 of both bytes are compared, the bit 1 of both bytes are compared, etc.).
Page 156 The corresponding bits of each byte are compared (i.e., bit 0 of both bytes are compared, bit 1 of both bytes are compared, etc.). The associated bit in the result byte is set if and only if one of the two compared bits is set. The result is stored in A. Rabbit 2000/3000 Microprocessor...
Page 157: Opcode Map
6. Opcode Map Table 1: Main Page RLCA RRCA BC,mn (BC),A AF,AF' HL,BC A,(BC) DJNZ DE,mn (DE),A HL,DE A,(DE) NZ,e HL,mn (mn),HL SP,d HL,HL HL,(mn) NC,e SP,mn (mn),A (HL) (HL) (HL),n HL,SP A,(mn) B,(HL) C,(HL) LD E,E D,(HL) (IDET) E,(HL) H,(HL) L,(HL) ALTD...
Page 158 Table 2: ED Page \LSB MSB\ LRET IPSET RETI IPSET BC',DE HL,BC (mn),BC BC',BC HL,BC BC,(mn) IPSET IPRES IPSET DE',DE HL,DE (mn),DE (SP),HL DE',BC HL,DE DE,(mn) PUSH SU POP SU SETUSR HL',DE HL,HL (mn),HL (HL),HL (mn),HL XPC,A HL',BC HL,HL HL,(mn) HL,(HL) HL,(mn) SYSCALL PUSH IP...
Page 159 Table 3: DD Page \LSB MSB\ IX,BC IX,DE IX,mn (mn),IX IX,IX IX,(mn) (IX+d) (IX+d) (IX+d),n IX,SP B,(IX+d) C,(IX+d) D,(IX+d) E,(IX+d) (IX),HL (mn),IX H,(IX+d) HL,(IX) IX,(mn) L,(IX+d) (IX+d), (IX+d), (IX+d), (IX+d), (IX+d), (IX+d), (IX+d), HL,IX IX,HL A,(IX+d) A,(IX+d) A,(IX+d) (IX+d) A,(IX+d) (IX+d) (IX+d) (IX+d)
Page 160 Table 4: FD Page \LSB MSB\ IY,BC IY,DE IY,mn (mn),IY IY,IY IY,(mn) (IY+d) (IY+d) (IY+d),n IX,SP B,(IY+d) C,(IY+d) D,(IY+d) E,(IY+d) (IY),HL (mn),IY H,(IY+d) HL,(IY) IY,(mn) L,(IY+d) (IY+d), (IY+d), (IY+d), (IY+d), (IY+d), (IY+d), (IY+d), HL,IY IY,HL A,(IY+d) A,(IY+d) A,(IY+d) (IY+d) A,(IY+d) XOR (IY+d) (IY+d) OR (IY+d)
Page 161 Table 5: CB Page (HL) (HL) (HL) (HL) (HL) (HL) (HL) 0,(HL) 1,(HL) 2,(HL) 3,(HL) 4,(HL) 5,(HL) 6,(HL) 7,(HL) 0,(HL) 1,(HL) 2,(HL) 3,(HL) 4,(HL) 5,(HL) 6,(HL) 7,(HL) 0,(HL) 1,(HL) 2,(HL) 3,(HL) 4,(HL) 5,(HL) 6,(HL) 7,(HL) Instruction Reference Manual...
Page 162 Table 6: DD-CB Page (IX+d) (IX+d) (IX+d) (IX+d) (IX+d) (IX+d) (IX+d) 0,(IX+d) 1,(IX+d) 2,(IX+d) 3,(IX+d) 4,(IX+d) 5,(IX+d) 6,(IX+d) 7,(IX+d) 0,(IX+d) 1,(IX+d) 2,(IX+d) 3,(IX+d) 4,(IX+d) 5,(IX+d) 6,(IX+d) 7,(IX+d) 0,(IX+d) 1,(IX+d) 2,(IX+d) 3,(IX+d) 4,(IX+d) 5,(IX+d) 6,(IX+d) 7,(IX+d) Instruction Reference Manual...
Page 163 Table 7: FD-CB Page (IY+d) (IY+d) (IY+d) (IY+d) (IY+d) (IY+d) (IY+d) 0,(IY+d) 1,(IY+d) 2,(IY+d) 3,(IY+d) 4,(IY+d) 5,(IY+d) 6,(IY+d) 7,(IY+d) 0,(IY+d) 1,(IY+d) 2,(IY+d) 3,(IY+d) 4,(IY+d) 5,(IY+d) 6,(IY+d) 7,(IY+d) 0,(IY+d) 1,(IY+d) 2,(IY+d) 3,(IY+d) 4,(IY+d) 5,(IY+d) 6,(IY+d) 7,(IY+d) Instruction Reference Manual...
Page 164 Instruction Reference Manual...
Page 165: Quick Reference Table
: An “N” in this column indicates that the instruction has been added to the Z180 instruction set by the Rabbit 2000/3000. An “M” indicates that this instruction is from the Z180, but has been modified. A “P” indicates a privileged instruction.
Page 166 INC ss 00ss0011 ss = ss + 1 11011011 I /O external prefix 11010011 I /O internal prefix IPSET 0 11101101 01000110 4 (2,2) IP = {IP[5:0], 00} IPSET 1 11101101 01010110 4 (2,2) IP = {IP[5:0], 01} Rabbit 2000/3000 Microprocessor...
Page 167 Opcode Opcode Opcode Opcode Instruction Clock cycles S Z LV C Operation N/M/P byte 1 byte 2 byte 3 byte 4 IPSET 2 11101101 01001110 4 (2,2) IP = {IP[5:0], 10} IPSET 3 11101101 01011110 4 (2,2) IP = {IP[5:0], 11} IPRES 11101101 01011101...
Page 168 10 (2,2,2,2,2) A[3:0]) L = (mn); H = (mn+1). (Addr[19:16] = LDP HL,(mn) 11101101 01101101 ----n--- ----m--- 13 (2,2,2,2,1,2,2) A[3:0]) IXL = (mn); IXH = (mn+1). (Addr[19:16] = LDP IX,(mn) 11011101 01101101 ----n--- ----m--- 13 (2,2,2,2,1,2,2) A[3:0]) Rabbit 2000/3000 Microprocessor...
Page 169 Opcode Opcode Opcode Opcode Instruction Clock cycles S Z LV C Operation N/M/P byte 1 byte 2 byte 3 byte 4 IYL = (mn); IYH = (mn+1). (Addr[19:16] = LDP IY,(mn) 11111101 01101101 ----n--- ----m--- 13 (2,2,2,2,1,2,2) A[3:0]) LJP x,mn 11000111 ----n--- ----m---...
Page 170 11001011 ----d--- 00111110 13 (2,2,2,2,2,3) (IX+d) = {0,(IX+d)[7,1]}; CY = (IX+d)[0] SRL (IY+d) 11111101 11001011 ----d--- 00111110 13 (2,2,2,2,2,3) (IY+d) = {0,(IY+d)[7,1]}; CY = (IY+d)[0] SRL r 11001011 00111-r- 4 (2,2) r = {0,r[7,1]}; CY = r[0] Rabbit 2000/3000 Microprocessor...
Page 171 Opcode Opcode Opcode Opcode Instruction Clock cycles S Z LV C Operation N/M/P byte 1 byte 2 byte 3 byte 4 SUB (HL) 10010110 5 (2,1,2) A = A - (HL) SUB (IX+d) 11011101 10010110 ----d--- 9 ( 2,2,2,1,2) A = A - (IX+d) SUB (IY+d) 11111101 10010110...
Page 172 Rabbit 2000/3000 Microprocessor...
Page 173: Notice To Users
Z80 and Z180 are trademarks of Zilog, Inc. Notice to Users Rabbit Semiconductor products are not authorized for use as crit- ical components in life-support devices or systems unless a spe- cific written agreement regarding such intended use is entered into between the customer and Rabbit Semiconductor prior to use.
Page 174 Rabbit 2000/3000 Microprocessor...

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