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Rabbit

6000 Microprocessor

User's Manual

90001108_J

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Page 1 ® Rabbit 6000 Microprocessor User’s Manual 90001108_J...
Page 2 Trademarks Rabbit and Dynamic C are registered trademarks of Digi International Inc. Rabbit 6000 is a trademark of Digi International Inc. The latest revision of this manual is available on the Digi Web site, http://www.digi.com/support/.
Page 3: Table Of Contents
ABLE OF ONTENTS 1. The Rabbit 6000 Processor 4.3.2 Real-Time Clock ......... 46 4.3.3 Watchdog Timer ........47 1.1 Introduction ............8 4.3.4 Secondary Watchdog Timer ....47 1.2 Features ............9 4.3.5 CPU Clock Cycle Counter ....47 1.3 Block Diagram ..........11 4.4 Register Descriptions ........
Page 4 17.2.1 I/O Pins ..........171 17.2.2 Clocks ..........171 17.2.3 Other Registers ........ 171 13. Parallel Port F 17.2.4 Interrupts ......... 172 17.3 Operation..........172 13.1 Overview ..........136 17.3.1 Handling Interrupts ......172 13.1.1 Block Diagram ........138 digi.com Rabbit 6000 User’s Manual...
Page 5 25. 10/100Base-T Ethernet 21.2.3 Interrupts .........218 25.1 Overview..........285 21.3 Operation..........219 25.1.1 Block Diagram ........ 287 21.3.1 Master Setup ........220 25.1.2 Registers .......... 288 21.3.2 Slave Setup ........220 25.2 Dependencies ........... 290 21.3.3 Master/Slave Communication ..221 digi.com Rabbit 6000 User’s Manual...
Page 6 32.3.1 Handling Interrupts ......363 28.4 Register Descriptions .......328 32.3.2 Example ISR ........364 32.4 Register Descriptions ....... 365 29. Quadrature Decoder 33. Flexible Interface Modules 29.1 Overview ..........333 29.1.1 Block Diagram ........335 33.1 Overview..........368 digi.com Rabbit 6000 User’s Manual...
Page 7 34.1.2 Registers ..........384 38.1.3 Mechanical Dimensions and Land 34.2 Dependencies ...........385 Pattern ............431 34.2.1 I/O Pins ..........385 38.2 Rabbit Pin Descriptions ......434 34.2.2 Clocks ..........385 34.2.3 Other Registers ........385 Appendix A. Parallel Port Pins with 34.3 Operation..........385 Alternate Functions 34.3.1 ECC ..........385...
Page 8: The Rabbit 6000 Processor
200 MHz, with compact code and support for up to 16 MB of memory. Operating with a 1.2 V core and 3.3 V I/O, the Rabbit 6000 boasts 16 channels of DMA, six serial ports with IrDA, 64+ digital I/O, quadrature decoder, PWM outputs, I C port, and pulse capture and measurement capabilities.
Page 9: Features
The PWM outputs can be filtered to create a 10-bit D/A con- verter or they can be used directly to drive devices such as motors or solenoids. The Rabbit 6000 has eight digi.com...
Page 10 C port capable of up to 400 kbits/s and 10-bit addressing. The Rabbit 6000 has three timer systems. Timer A consists of twelve 8-bit counters, each of which has a pro- grammed time constant. Six of them can be cascaded from the primary Timer A counter. Timer B contains a 10-bit counter, two match registers, and two step registers.
Page 11: Block Diagram
1.3 Block Diagram Figure 1.1 Rabbit 6000 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 12: Basic Specifications
1.4 Basic Specifications Two versions of the Rabbit 6000 are available—the standard 292-ball BGA and a smaller 233-ball BGA for specialty Wi-Fi applications. The larger package is intended for most Rabbit applications; the smaller package has no address or data bus, and is intended for particular applications. If you need further informa- tion, please contact your Rabbit sales representative.
Page 13: Comparing Rabbit Microprocessors
1.5 Comparing Rabbit Microprocessors The Rabbit 2000, Rabbit 3000, Rabbit 4000, Rabbit 5000, and Rabbit 6000 features are compared below. Feature Rabbit 6000 Rabbit 5000 Rabbit 4000 Rabbit 3000 Rabbit 2000 Maximum Clock Speed, 200 MHz 100 MHz 60 MHz 55.5 MHz...
Page 14 Clock speed/8 Clock Speed/8 Clock Speed/8 Clock Speed/8 Clock Speed/32 Baud Rate Hardware None None None None C Ports 10/100Base-T 10/100Base-T 10Base-T Ethernet Port None None with PHY (MAC only) (partial PHY) Wi-Fi (802.11a/b/g) USB (2.0 compatible) Full-speed host PWM Outputs None digi.com Rabbit 6000 User’s Manual...
Page 15 (Wi-Fi disabled) D/A Converter Channels None None None (Wi-Fi disabled) * Limitations on the use of the 1MB internal RAM are present when running in lower CPU frequency or sleepy modes. See Section 5.3.1, “Internal RAM”. digi.com Rabbit 6000 User’s Manual...
Page 16: Clocks
I/O ring further reduce EMI from the Rabbit 6000. Note that the spectrum spreader is not usable at main clock frequencies above 115 MHz because of the short period.
Page 17: Block Diagram
Global Clock Modulator 0 Register GCM0R 0x000A 00000000 Global Clock Modulation 1 Register GCM1R 0x000B 00000000 Global Clock Double Register GCDR 0x000F 00000000 Master System Configuration Register MSCR 0x0434 00000000 Master System Status Register MSSR 0x0435 00000x00 digi.com Rabbit 6000 User’s Manual...
Page 18: Dependencies
The 32 kHz clock input is on the CLK_32K pin. There is an internal Schmitt trigger on this pin to reduce sensitivity to noise. The peripheral clock or peripheral clock divided by 2 may be optionally output on the CLK pin by enabling it via bits 7–6 in GOCR. digi.com Rabbit 6000 User’s Manual...
Page 19: Other Registers
Wi-Fi PLL status. GCM0R, GCM1R Used to select the main PLL loop and pre-divider values. GCDR Used to enable the main PLL. ENPR Used to enable the Wi-Fi PLL (automatic when Wi-Fi is enabled). digi.com Rabbit 6000 User’s Manual...
Page 20: Operation
When the 32 kHz clock is enabled in GCSR, it can be further divided by 2, 4, 8, or 16 to generate even lower frequencies by enabling those modes in bits 0–2 of GPSCR. See Table 2-6 for more details. digi.com Rabbit 6000 User’s Manual...
Page 21: Main Pll
48 MHz 192 MHz 384 MHz xxx10000 xxxx0010 Note that if the PLL is enabled, restrictions may exist for the use of the spectrum spreader and clock dou- bler. The following sections provide more details. digi.com Rabbit 6000 User’s Manual...
Page 22: Spectrum Spreader
Strong 00xxxxxx up to 50 MHz; strong spreading of 3 ns frequencies over 50 MHz Strong spreading of frequencies up Strong — 10xxxxxx to 50 MHz; normal spreading of 4.5 ns frequencies over 50 MHz digi.com Rabbit 6000 User’s Manual...
Page 23 If the doubler is not used, then the spreader affects every clock cycle, and the clock low time is reduced. digi.com Rabbit 6000 User’s Manual...
Page 24: Clock Doubler
Table 2-5. Recommended Delays Set In GCDR for Clock Doubler Recommended GCDR Value Frequency Range 7.3728 MHz 0x0F 0x0B 7.3728–11.0592 MHz 0x09 11.0592–16.5888 MHz 0x06 16.5888–20.2752 MHz 0x03 20.2752–52.8384 MHz 0x01 52.8384–77.4144 MHz 0x00 >77.4144 MHz digi.com Rabbit 6000 User’s Manual...
Page 25 2 clocks long and includes both a long and a short clock, resulting in no net change due to asymmetry. However, if an odd number of wait states is used, then the memory access time will be affected slightly. digi.com Rabbit 6000 User’s Manual...
Page 26: 32 Khz Clock
32 kHz clock is optional. A self-contained external oscillator is the recommended oscillator circuit for the Rabbit 6000, but a tunable oscillator circuit such as the one shown below may be used. The values of resistors and capacitors may need to be adjusted for various frequencies and crystal load capacitances.
Page 27 Details about this requirement are available in Technical Note TN303, “Conformal Coating”, from the Rabbit Web site. The need for a conformal coating can be avoided by using a single external clock chip.
Page 28: Register Descriptions
Processor clock from the main clock, divided by 6. Peripheral clock from the main clock, divided by 6. Periodic interrupts are disabled. Periodic interrupts use Interrupt Priority 1. Periodic interrupts use Interrupt Priority 2. Periodic interrupts use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 29 These bits are reserved and should be written with zeros. System PLL pre-divider value. All zeros is not a valid value for the PLL pre-divider. Neither divider value should not be modified while the PLL is supplying the clock to the system. digi.com Rabbit 6000 User’s Manual...
Page 30 25.5 ns nominal Low time. 01101 27 ns nominal Low time. 01110 28.5 ns nominal Low time. 01111 30 ns nominal Low time. 10001 4.5 nS nominal Low time. 10010 6 nS nominal Low time. digi.com Rabbit 6000 User’s Manual...
Page 31 This bit combination is reserved and should not be used. /BUFEN pin is active (low) during external I/O cycles. /BUFEN pin is active (low) during data memory accesses. /BUFEN pin is low. /BUFEN pin is high. digi.com Rabbit 6000 User’s Manual...
Page 32 This bit combination is reserved and should not be used. FIMA clock from system PLL output. Response to this setting may be delayed until the PLL output is stable (roughly 200 µs after enabling the system PLL, uses 32 kHz clock to generate delay). digi.com Rabbit 6000 User’s Manual...
Page 33 Wi-Fi PLL not enabled or output not stable. (Read- Wi-Fi PLL is enabled, with stable output. only) System PLL not enabled or output not stable. (Read- System PLL is enabled, with stable output. only) digi.com Rabbit 6000 User’s Manual...
Page 34 Network Port D interrupts use Interrupt Priority 3. Network Port C interrupts are disabled. Network Port C interrupts use Interrupt Priority 1. Network Port C interrupts use Interrupt Priority 2. Network Port C interrupts use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 35: Reset And Bootstrap
After reset, the Rabbit 6000 checks the state of the SMODE and SYSCFG pins. Depending on the state of the SMODE pins, it either begins normal operation by fetching instruction bytes from memory bank zero, which is mapped to either /CS0 or /CS3 depending on the state of the SYSCFG pin, or it enters a special bootstrap mode where it fetches bytes from either Serial Port A or the slave port.
Page 36: Block Diagram
3.1.1 Block Diagram 3.1.2 Registers Register Name Mnemonic I/O Address Reset Slave Port Control Register SPCR 0x0024 0xx00000 digi.com Rabbit 6000 User’s Manual...
Page 37: Dependencies
SMODE0 and SMODE1 pins controls its operation. SYSCFG — When the Rabbit 6000 is first powered up or when it is reset, the state of this pin controls whether memory bank zero is mapped to /CS0 or the internal SRAM (/CS3).
Page 38: Operation
3.3 Operation Pulling the /RESET pin low will initialize everything in the Rabbit 6000 except for the real-time clock reg- isters, the 32K battery-backed RAM and the onchip-encryption RAM. The reset of the Rabbit 6000 is delayed until any write cycles in progress are completed; the reset takes effect as soon as no write cycles are occurring.
Page 39 Bootstrap from Serial Port A, asynchronous mode. If both SMODE pins are zero, the Rabbit 6000 begins fetching instructions from the memory device mapped into memory bank 0. When SYSCFG is low, memory bank 0 is set to /CS0 and /OE0. If SYSCFG is high, memory bank 0 is set to /CS3 and /OE0.
Page 40: Asynchronous Serial Bootstrap
Serial clock (output to serial flash) The Rabbit 6000 divides the main clock by 64 to provide the SPI clock for the serial flash bootstrap. Once this mode is entered, the Rabbit 6000 will send the byte sequence “0x03 0x00 0x00 0x00”, which is an industry-standard command that enables continuous read mode starting at serial flash address 0x0.
Page 41: Parallel Bootstrap
3.3.3 Parallel Bootstrap When the parallel bootstrap mode is selected by the SMODE pins, the Rabbit 6000 will enable the parallel slave port interface on Parallel Ports A and B, and will wait for triplets to be sent to that interface. See Chapter 21 for more details on the operation of the slave port.
Page 42: System Management
RAM to read out the bytes. A feature new to the Rabbit 6000 is a 14-bit CPU clock cycle counter. This counter counts the number of CPU cycles that occur during one 32 kHz clock period. This is useful for determining the frequency of the main CPU oscillator which can be used in baud rate calculations as well as other CPU clock dependant features.
Page 43: Block Diagram
4.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 44: Registers
Global CPU Configuration Register GCPU 0x002E 0xx00010 Global Revision Register GREV 0x002F 0xx00000 Battery-Backed Onchip-Encryption RAM VRAM00– 0x0600– xxxxxxxx Bytes 00–1F VRAM1F 0x061F Master System Configuration Register MSCR 0x0434 00000000 Master System Status Register MSSR 0x0435 00000x00 digi.com Rabbit 6000 User’s Manual...
Page 45: Dependencies
It is cleared by restarting the secondary watchdog by writing 0x5F to WDTCR or writ- ing a new timeout value to SWDTR. The secondary watchdog interrupt always occurs at Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 46: Operation
0x40 – 0xC0 to RTCCR and then writing bytes repeatedly to RTCCR to increment the appropriate bytes of the real-time clock. The byte increment mode is disabled by writing 0x00 to RTCCR. digi.com Rabbit 6000 User’s Manual...
Page 47: Watchdog Timer
8 bits of this 14-bit counter are accessed by reading WDTCR, and the upper 6 bits are accessed by reading WDTTR. This value is updated continually, so be careful to not change the main clock frequency between reading the two registers. digi.com Rabbit 6000 User’s Manual...
Page 48: Register Descriptions
Processor clock from the main clock, divided by 6. Peripheral clock from the main clock, divided by 6. Periodic interrupts are disabled. Periodic interrupts use Interrupt Priority 1. Periodic interrupts use Interrupt Priority 2. Periodic interrupts use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 49 Description Read The current value of the 48-bit real-time clock counter is returned. Writing to RTC0R transfers the current count of the real-time clock to a Write holding register while the real-time clock continues counting. digi.com Rabbit 6000 User’s Manual...
Page 50 The watchdog timer will be re-enabled by any other write to this register. other Normal clocking (32 kHz clock) for the watchdog timer. read Return the most-significant 6 bits of the CPU clock cycle counter. digi.com Rabbit 6000 User’s Manual...
Page 51 Program fetch as a function of the SMODE pins. (Read- Ignore the SMODE pins program fetch function. only) Read These bits report the state of the SMODE pins. 00010 RAM identifier for this version of the chip. digi.com Rabbit 6000 User’s Manual...
Page 52 Program fetch as a function of the SMODE pins. (Read- Ignore the SMODE pins program fetch function. only) Read These bits report the state of the SMODE pins. 00100 CPU identifier for this version of the chip. digi.com Rabbit 6000 User’s Manual...
Page 53 These bits report the state of the SMODE pins. 00000 CPU identifier for this version of the chip. Battery-Backed Onchip-Encryption RAM (VRAM00) (Address = 0x0600) through through (VRAM31) (Address = 0x061F) Bit(s) Value Description General-purpose RAM locations. Cleared by Intrusion Detect conditions. digi.com Rabbit 6000 User’s Manual...
Page 54: Memory Management
ANAGEMENT 5.1 Overview The Rabbit 6000 supports both 8-bit and 16-bit external flash and SRAM devices; three chip selects, and two read/write-enable strobes allow up to six external devices to be attached at once. The 8-bit mode allows 0, 1, 2, or 4 wait states to be specified for each device, and the 16-bit mode allows 0 to 7 wait states depending on the settings.
Page 55 Figure 5.1 Mapping Rabbit 6000 Physical Memory Space Either one or both of the two most significant address bits (which are used to select the quadrant) can be inverted, providing the ability to bank-switch other pages from a larger memory device into the same memory bank.
Page 56 The same instructions can be used to write to logical addresses. All of these instructions are available in the Rabbit 6000, as well as new instructions for more operations using physical addresses.
Page 57: Block Diagram
5.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 58: Registers
Advanced /CS0 Control Register ACS0CR 0x0410 00000000 Advanced /CS1 Control Register ACS1CR 0x0411 00000000 Advanced /CS2 Control Register ACS2CR 0x0412 00000000 RAM Segment Register RAMSR 0x0448 00000000 Write-Protect n Register (n = 0–31) WPnR 0x460 + n 00000000 digi.com Rabbit 6000 User’s Manual...
Page 59 Stack Low Limit Register STKLLR 0x0445 xxxxxxxx Stack High Limit Register STKHLR 0x0446 xxxxxxxx Address Bus Pin Control Register ADPCR 0x04A0 xxx00000 Data Bus Pin Control Register DBPCR 0x04A1 xxx00000 Control Pin Control Register CPCR 0x04A2 xxx00000 digi.com Rabbit 6000 User’s Manual...
Page 60: Dependencies
When a stack-related write is attempted to a region outside that set by the stack limit registers, a stack limit violation occurs. The interrupt request is cleared when it is handled. The stack limit violation interrupt vec- tor is in the IIR at offset 0x1B0. It is always set to Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 61: Operation
5.3.1 Internal RAM There are two internal RAM devices in the Rabbit 6000. A 1 MB RAM is located on /CS3, /OE0, /WE0, and a 32 KB battery-backed SRAM is located on /CS3, /OE1, /WE1. Both of them can be run at speeds up to 200 MHz with no additional wait states.
Page 62: Memory Bank Operation
5.3.3 Memory Bank Operation On startup the Rabbit 6000 checks the status of the SYSCFG pin. To provide support for external memory, the SYSCFG pin should be set low and Memory Bank 0 enabled to use /CS0, /OE0, and /WE0 in 8-bit mode with four wait states and write protection enabled.
Page 63 It is possible to force /CS1 to be always active in MMIDR; enabling this will cause conflicts only if a device shares a /OE or /WE strobe with another device. This option allows faster access to particular memory devices. digi.com Rabbit 6000 User’s Manual...
Page 64: Memory Modes
5.3.4 Memory Modes The Rabbit 6000 supports both 8-bit and 16-bit memories on all chip selects, including both internal RAMs. It also provides support for page-mode devices. The mode for each chip select is set in MACR; 8- bit mode is the default for all chip selects.
Page 65 In the Rabbit 6000 (and most memory devices) a page can be selected as either 8 or 16 bytes. Thus, if an address is identical to the previous address except in the lower four bits, the access time is assumed to be faster.
Page 66: Separate Instruction And Data Space
“window” that uses the instruction address decoding when read or written as data. This mapping will only occur when the RAMSR is within the root or data segments; the RAMSR will be ignored if it is mapped to the stack segment or XPC window. digi.com Rabbit 6000 User’s Manual...
Page 67: Memory Protection
WPSxR, WPSxLR, WPSxHR 5.3.7 Stack Protection The Rabbit 6000 provides stack overflow and underflow protection. Low and high logical address limits can be set in STKLLR and STKHLR; a Priority 3 stack-violation interrupt occurs when a stack-based write occurs within the 16 bytes below the upper limit or within the 16 bytes above the lower limit. Note that the writes will still occur even if they are within the 16 bytes surrounding the limits, but the interrupt can serve as a warning to the application that the stack is in danger of being over or underrun.
Page 68: Register Descriptions
MBxCR decision. Normal operation. For a data segment access, invert A16 Normal operation. For a root segment access, invert bank select address MSB before MBxCR decision. Normal operation. For a root segment access, invert A16 digi.com Rabbit 6000 User’s Manual...
Page 69 (Address = 0x0012) Bit(s) Value Description Read The current contents of this register are reported. Eight LSBs (MSBs are set to zero by write) of physical address offset to Write use if: SEGSIZ[3:0]  Addr[15:12] < SEGSIZ[7:4] digi.com Rabbit 6000 User’s Manual...
Page 70 (Address = 0x0013) Bit(s) Value Description Read The current contents of this register are reported. Boundary value for switching from DATSEG to STACKSEG for Write translation. Write Boundary value for switching from none to DATSEG for translation. digi.com Rabbit 6000 User’s Manual...
Page 71 /CS2 is active for accesses in this bank. /CS3 (internal memory) is active for accesses in this bank. When standalone operation is selected (by strapping the SCFG pin high), this bit combination is forced for MB0CR only. digi.com Rabbit 6000 User’s Manual...
Page 72 /CS2 is active for accesses in this bank. /CS3 (internal memory) is active for accesses in this bank. When standalone operation is selected (by strapping the SCFG pin high), this bit combination is forced for MB0CR only. digi.com Rabbit 6000 User’s Manual...
Page 73 For an XPC access, use MB1LCR independent of Bank Select Address. 0110 For an XPC access, use MB2LCR independent of Bank Select Address. 0111 For an XPC access, use MB3LCR independent of Bank Select Address. digi.com Rabbit 6000 User’s Manual...
Page 74 Extended timing for /WE1 (falling edge to falling edge, two clocks minimum). Normal timing for /WE0 (rising edge to falling edge, one and one-half clocks minimum). Extended timing for /WE0 (falling edge to falling edge, two clocks minimum). digi.com Rabbit 6000 User’s Manual...
Page 75 Page-Mode 8-bit operation for /CS1. Normal 16-bit operation for /CS1. Page-Mode 16-bit operation for /CS1. Normal 8-bit operation for /CS0. Page-Mode 8-bit operation for /CS0. Normal 16-bit operation for /CS0. Page-Mode 16-bit operation for /CS0. digi.com Rabbit 6000 User’s Manual...
Page 76 Disable RAM segment limit checking. Select data-type MMU translation if PC[15:10] is equal to RAMSR[7:2]. Select data-type MMU translation if PC[15:11] is equal to RAMSR[7:3]. Select data-type MMU translation if PC[15:12] is equal to RAMSR[7:4]. digi.com Rabbit 6000 User’s Manual...
Page 77 (Address = 0x0480) (WPSBR) (Address = 0x0484) Bit(s) Value Description When these eight bits [23:16] match bits of the physical address, write- protect that 64 KB range in 4 KB increments using WPSxLR and WPSxHR. digi.com Rabbit 6000 User’s Manual...
Page 78 Write-Protect Segment x Low Register (WPSALR) (Address = 0x0481) (WPSBLR) (Address = 0x0485) Bit(s) Value Description Disable 4 KB write protect for relative address 0x7000–0x7FFF in WP Segment x. Enable 4 KB write protect for relative address 0x7000–0x7FFF in WP Segment x.
Page 79 Write-Protect Segment x High Register (WPSAHR) (Address = 0x0482) (WPSBHR) (Address = 0x0486) Bit(s) Value Description Disable 4 KB write protect for relative address 0xF000–0xFFFF in WP Segment x. Enable 4 KB write protect for relative address 0xF000–0xFFFF in WP Segment x.
Page 80 Fast output slew rate. Slow output slew rate. 4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. These bits are reserved and should be written with zeros. digi.com Rabbit 6000 User’s Manual...
Page 81 4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. No pullup or pulldown resistors. 75 k pullup resistor. 75 k pulldown resistor. 75 k keeper. digi.com Rabbit 6000 User’s Manual...
Page 82 Fast output slew rate. Slow output slew rate. 4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. These bits are reserved and should be written with zeros. digi.com Rabbit 6000 User’s Manual...
Page 83: Interrupts
NTERRUPTS 6.1 Overview The Rabbit 6000 can operate at one of four priority levels, 0–3, with Priority 0 being the expected standard operating level. The current priority and up to three previous priority levels are kept in the processor’s 8- bit IP register, where bits 0–1 contain the current priority.
Page 84: Operation
The second column shows the vectors in the first 256 bytes of the table, and the third column shows the vectors in the second 256 bytes. Interrupts that are new to the Rabbit 6000 are highlighted as such.
Page 85 Table 6-2 shows the structure of the external interrupt vector table. Each interrupt vector falls on a 16-byte boundary inside the table. Interrupts that are new to the Rabbit 6000 are highlighted as such. Table 6-2. External Interrupt Vector Table Structure...
Page 86 Serial Port C Tx: Write to SCDR, SCAR, SCLR or dummy write to SCSR. Rx: Read from SDDR or SDAR. Lowest Serial Port D Tx: Write to SDDR, SDAR, SDLR or dummy write to SDSR. digi.com Rabbit 6000 User’s Manual...
Page 87: External Interrupts
7.1 Overview The Rabbit 6000 has eight external interrupt vectors. Interrupts 0 and 1 can share up to three pins each, and interrupts 2–7 each only have one pin, providing a total of up to 12 external interrupt inputs out of 22 pos- sible pins.
Page 88: Block Diagram
7.2 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 89: Registers
Interrupt 3 Control Register I3CR 0x009B xx000000 Interrupt 4 Control Register I4CR 0x009C xx000000 Interrupt 5 Control Register I5CR 0x009D xx000000 Interrupt 6 Control Register I6CR 0x009E xx000000 Interrupt 7 Control Register I7CR 0x009F xx000000 digi.com Rabbit 6000 User’s Manual...
Page 90: Dependencies
External interrupts 0 and 1 can be enabled on pins PD0, PD1, PE0, PE1, PE4, and PE5. The remaining interrupts can be enabled on any pin of Parallel Ports F or G. Each pin is associated with a particular inter- rupt vector as shown in Table 7-1 below. Table 7-1. Rabbit 6000 Interrupt Vectors Vector Register...
Page 91: Operation
Interrupts 2-7 allow only a single input at any one time. 7.4.1 Example ISR A sample interrupt handler is shown below. extInt_isr:: ; respond to external interrupt here ; interrupt is automatically cleared by interrupt acknowledge ipres digi.com Rabbit 6000 User’s Manual...
Page 92: Register Descriptions
Parallel Port E low nibble interrupt on both edges. This external interrupt is disabled. This external interrupt uses Interrupt Priority 1. This external interrupt uses Interrupt Priority 2. This external interrupt uses Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 93 Interrupt on falling edge. Interrupt on rising edge. Interrupt on both edges. This external interrupt is disabled. This external interrupt uses Interrupt Priority 1. This external interrupt uses Interrupt Priority 2. This external interrupt uses Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 94: Overview
After reset, the default condition for Parallel Port A is all inputs. When PADR is read, the actual voltage on the pins is returned, whether the port is set as an input or an output. digi.com Rabbit 6000 User’s Manual...
Page 95: Block Diagram
8.1.1 Block Diagram 8.1.2 Registers Register Name Mnemonic I/O Address Reset Port A Data Register PADR 0x0030 xxxxxxxx Port Ax Control Register (x = 0-7) PAxCR 0x04B0 + x xxx00000 digi.com Rabbit 6000 User’s Manual...
Page 96: Dependencies
Any outputs on Parallel Port A are clocked by the peripheral clock. 8.2.3 Other Registers Register Function SPCR Used to set up Parallel Port A. 8.2.4 Interrupts There are no interrupts associated with Parallel Port A, except when the slave port is being used. digi.com Rabbit 6000 User’s Manual...
Page 97: Operation
If one of the Flexible Interface Modules has been enabled to use Parallel Port A, writing to PADR will no longer change the state of the pins. The other Parallel Port A registers are still valid. Refer to Chapter 33 for more details. digi.com Rabbit 6000 User’s Manual...
Page 98: Parallel Port A
4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. No pullup or pulldown resistor. 75 k pullup resistor. 75 k pulldown resistor. 75 k keeper. digi.com Rabbit 6000 User’s Manual...
Page 99 Parallel Port B[7:0] is used for the address bus. Slave port interrupts are disabled. Slave port interrupts use Interrupt Priority 1. Slave port interrupts use Interrupt Priority 2. Slave port interrupts use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 100: Overview
Note that it is possible for either Flexible Interface Module to use any of the parallel ports. See Chapter 33 for more information. Table 9-1. Parallel Port B Pin Alternate Output Functions Serial Ports External I/O Pin Name A–D — — — — — — SCLKA SCLKB digi.com Rabbit 6000 User’s Manual...
Page 101: Block Diagram
After reset, the default condition for Parallel Port B is six inputs (bits 2-7) and two outputs (bits 0-1). When PBDR is read, the actual voltage on the pins is returned, whether the pins are set as inputs or out- puts. 9.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 102: Registers
I/O bus; as control signals for the slave port; or as clocks for Serial Ports A and B. On startup, bits 6 and 7 are outputs set low for backwards compatibility with the Rabbit 2000. All other pins are inputs.
Page 103: Operation
If one of the Flexible Interface Module has been enabled to use Parallel Port B, writing to PBDR will no longer change the state of the pins. The other Parallel Port B registers are still valid. Refer to Chapter 33 for more details. digi.com Rabbit 6000 User’s Manual...
Page 104: Parallel Port B
4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. No pullup or pulldown resistor. 75 k pullup resistor. 75 k pulldown resistor. 75 k keeper. digi.com Rabbit 6000 User’s Manual...
Page 105 Parallel Port B[7:0] is used for the address bus. Slave port interrupts are disabled. Slave port interrupts use Interrupt Priority 1. Slave port interrupts use Interrupt Priority 2. Slave port interrupts use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 106: Overview
Alt Out 0 Alt Out 1 Alt Out 2 Alt Out 3 PWM3 SCLKC PWM2 PWM1 RCLKE PWM0 TCLKE TIMER C3 SCLKD TIMER C2 TIMER C1 RCLKF TIMER C0 TCLKF NOTE: I0-I7 are strobes for External I/O digi.com Rabbit 6000 User’s Manual...
Page 107: Block Diagram
After reset, the default condition for Parallel Port C is four outputs (the even-numbered bits) and four inputs (the odd-numbered bits). For compatibility with the Rabbit 2000 and the Rabbit 3000 microproces- sors, these outputs are driven with a logic zero (low) on PC6 and a logic one (high) on PC4, PC2, and PC0.
Page 108: Registers
On startup, PC4, PC2, and PC0 are outputs set high, PC6 is set low, and the other pins are inputs for com- patibility with the Rabbit 3000. The individual pins can be set to be open-drain via PCDCR. Drive strength, slew rate, and the pullup/down resistor status are selectable via PCxCR.
Page 109: Operation
If one of the Flexible Interface Modules has been enabled to use Parallel Port C, writing to PCDR will no longer change the state of the pins, and the settings of PCFR, PCALR, and PCAHR will be ignored. The other Parallel Port C registers are still valid. Refer to Chapter 33 for more details. digi.com Rabbit 6000 User’s Manual...
Page 110: Parallel Port C
Parallel Port C bit 0 alternate output 0 (TXD). Parallel Port C bit 0 alternate output 1 (I0). Parallel Port C bit 0 alternate output 2 (TIMER C0). Parallel Port C bit 0 alternate output 3 (TCLKF). digi.com Rabbit 6000 User’s Manual...
Page 111 The corresponding port bit, as an output, is open-drain. Parallel Port C Function Register (PCFR) (Address = 0x0055) Bit(s) Value Description The corresponding port bit functions normally. The corresponding port bit carries its alternate signal as an output. See Table 10-1. digi.com Rabbit 6000 User’s Manual...
Page 112 4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. No pullup or pulldown resistor. 75 k pullup resistor. 75 k pulldown resistor. 75 k keeper. digi.com Rabbit 6000 User’s Manual...
Page 113: Overview
Alt Out 2 Alt Out 3 PWM3 SCLKC PWM2 PWM1 RCLKE PWM0 TCLKE TIMER C3 SCLKD SCLKC TIMER C2 TIMER C1 RCLKF SCLKD TIMER C0 TCLKF NOTE: IA6 and IA7 are address bits for External I/O. digi.com Rabbit 6000 User’s Manual...
Page 114 — — — — — — RCLKE — — — — — TCLKE — — — DREQ1 — QD2A — SCLKC — DREQ0 — QD2B RCLKF — INT1 QD1A — SCLKD TCLKF — INT0 QD1B digi.com Rabbit 6000 User’s Manual...
Page 115: Block Diagram
11.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 116: Registers
0x0065 xxxxxxxx Port D Drive Control Register PDDCR 0x0066 xxxxxxxx Port D Data Direction Register PDDDR 0x0067 00000000 Port D Bit x Register PDBxR 0x0068+x xxxxxxxx Port Dx Control Register PDxCR 0x04E0 + x xxx00000 digi.com Rabbit 6000 User’s Manual...
Page 117: Dependencies
Select a Parallel Port D pin as an external interrupt input. DMR0CR, DMR1CR Select a Parallel Port D pin as an external DMA request input. 11.2.4 Interrupts External interrupts can be accepted from pins PD1 or PD0; see Chapter 7 for more details. digi.com Rabbit 6000 User’s Manual...
Page 118: Operation
If one of the Flexible Interface Module has been enabled to use Parallel Port D, writing to PDDR will no longer change the state of the pins, and the settings of PDFR, PDALR, and PDAHR will be ignored. The other Parallel Port D registers are still valid. Refer to Chapter 33 for more details. digi.com Rabbit 6000 User’s Manual...
Page 119: Parallel Port D
Parallel Port D bit 0 alternate output 0 (SCLKD). Parallel Port D bit 0 alternate output 1 (I0). Parallel Port D bit 0 alternate output 2 (TIMER C0). Parallel Port D bit 0 alternate output 3 (TCLKF). digi.com Rabbit 6000 User’s Manual...
Page 120 The lower nibble of the port transfer clock is the output of Timer A1. The lower nibble of the port transfer clock is the output of Timer B1. The lower nibble of the port transfer clock is the output of Timer B2. digi.com Rabbit 6000 User’s Manual...
Page 121 The port buffer (bit 1) is written with the value of this bit. The port buffer Write will be transferred to the port output register on the next rising edge of the port transfer clock digi.com Rabbit 6000 User’s Manual...
Page 122 The port buffer (bit 5) is written with the value of this bit. The port buffer Write will be transferred to the port output register on the next rising edge of the port transfer clock digi.com Rabbit 6000 User’s Manual...
Page 123 The port buffer (bit 7) is written with the value of this bit. The port buffer Write will be transferred to the port output register on the next rising edge of the port transfer clock digi.com Rabbit 6000 User’s Manual...
Page 124 4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. No pullup or pulldown resistor. 75 k pullup resistor. 75 k pulldown resistor. 75 k keeper. digi.com Rabbit 6000 User’s Manual...
Page 125: Overview
Alt Out 1 Alt Out 2 Alt Out 3 — PWM3 SCLKC — PWM2 SCLKG PWM1 RCLKE SDATG PWM0 TCLKE — TIMER C3 SCLKD USB_PWR TIMER C2 SCLKG TIMER C1 RCLKF SDATG TIMER C0 TCLKF digi.com Rabbit 6000 User’s Manual...
Page 126 — — DREQ0 — QD2B RCLKE — INT1 QD1A — — TCLKE — INT0 QD1B DREQ1 — QD2A OVCR — SCLKC — DREQ0 — QD2B RCLKF — INT1 QD1A — SCLKD TCLKF — INT0 QD1B digi.com Rabbit 6000 User’s Manual...
Page 127: Block Diagram
12.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 128: Registers
0x0075 00000000 Port E Drive Control Register PEDCR 0x0076 00000000 Port E Data Direction Register PEDDR 0x0077 00000000 Port E Bit x Register PEBxR 0x0078+x xxxxxxxx Port Ex Control Register PExCR 0x04F0 + x xxx00000 digi.com Rabbit 6000 User’s Manual...
Page 129: Dependencies
Select a Parallel Port E pin for I/O handshake. USBWR Enable USB overcurrent detection on PE3. 12.2.4 Interrupts External interrupts can be accepted from pins PE5, PE4, PE1 or PE0; see Chapter 7 for more details. digi.com Rabbit 6000 User’s Manual...
Page 130: Operation
If one of the Flexible Interface Modules has been enabled to use Parallel Port E, writing to PEDR will no longer change the state of the pins, and the settings of PEFR, PEALR, and PEAHR will be ignored. The other Parallel Port E registers are still valid. Refer to Chapter 33 for more details. digi.com Rabbit 6000 User’s Manual...
Page 131: Parallel Port E
Parallel Port E bit 0 alternate output 0 (I0). Parallel Port E bit 0 alternate output 1 (SDATG). Parallel Port E bit 0 alternate output 2 (TIMER C0). Parallel Port E bit 0 alternate output 3 (TCLKF). digi.com Rabbit 6000 User’s Manual...
Page 132 The lower nibble peripheral clock is perclk/2. The lower nibble peripheral clock is the output of Timer A1. The lower nibble peripheral clock is the output of Timer B1. The lower nibble peripheral clock is the output of Timer B2. digi.com Rabbit 6000 User’s Manual...
Page 133 These bits are ignored. The port buffer (bit 1) is written with the value of this bit. The port buffer Write will be transferred to the port output register on the next rising edge of the peripheral clock. digi.com Rabbit 6000 User’s Manual...
Page 134 These bits are ignored. The port buffer (bit 5) is written with the value of this bit. The port buffer Write will be transferred to the port output register on the next rising edge of the peripheral clock. digi.com Rabbit 6000 User’s Manual...
Page 135 4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. No pullup or pulldown resistor. 75 k pullup resistor. 75 k pulldown resistor. 75 k keeper. digi.com Rabbit 6000 User’s Manual...
Page 136: Overview
Alt Out 1 Alt Out 2 Alt Out 3 FIMA7 PWM3 SCLKC FIMA6 PWM2 FIMA5 PWM1 RCLKE FIMA4 PWM0 TCLKE FIMA3 TIMER C3 SCLKD FIMA2 TIMER C2 FIMA1 TIMER C1 RCLKF FIMA0 TIMER C0 TCLKF digi.com Rabbit 6000 User’s Manual...
Page 137 Table 13-2. Parallel Port F Pin Alternate Input Functions External Pin Name Interrupts INT2–7 FIMA7 INT2–7 FIMA6 INT2–7 FIMA5 INT2–7 FIMA4 INT2–7 FIMA3 INT2–7 FIMA2 INT2–7 FIMA1 INT2–7 FIMA0 digi.com Rabbit 6000 User’s Manual...
Page 138: Block Diagram
13.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 139: Registers
Parallel Port F pins can be synchronized to the output of Timer A1, Timer B1, or Timer B2. 13.2.3 Other Registers Register Function I2CR, I3CR, I4CR, Select a Parallel Port F pin as an external interrupt input. I5CR, I6CR, I7CR digi.com Rabbit 6000 User’s Manual...
Page 140: Interrupts
Parallel Port F, writing to PFDR will no longer change the state of the pins, and the set- tings of PFFR, PFALR, and PFAHR will be ignored. The other Parallel Port F registers are still valid. Refer to Chapter 33 for more details. digi.com Rabbit 6000 User’s Manual...
Page 141: Parallel Port F
Parallel Port F bit 0 alternate output 0 (FIMA0). Parallel Port F bit 0 alternate output 1 (I0). Parallel Port F bit 0 alternate output 2 (TIMER C0). Parallel Port F bit 0 alternate output 3 (TCLKF). digi.com Rabbit 6000 User’s Manual...
Page 142 The lower nibble peripheral clock is perclk/2. The lower nibble peripheral clock is the output of Timer A1. The lower nibble peripheral clock is the output of Timer B1. The lower nibble peripheral clock is the output of Timer B2. digi.com Rabbit 6000 User’s Manual...
Page 143 The corresponding port bit, as an output, is open-drain. Parallel Port F Data Direction Register (PFDDR) (Address = 0x003F) Bit(s) Value Description The corresponding port bit is an input. The corresponding port bit is an output. digi.com Rabbit 6000 User’s Manual...
Page 144 4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. No pullup or pulldown resistor. 75 k pullup resistor. 75 k pulldown resistor. 75 k keeper. digi.com Rabbit 6000 User’s Manual...
Page 145: Overview
Alt Out 1 Alt Out 2 Alt Out 3 FIMB7 PWM3 SCLKC FIMB6 PWM2 FIMB5 PWM1 RCLKE FIMB4 PWM0 TCLKE FIMB3 TIMER C3 SCLKD FIMB2 TIMER C2 FIMB1 TIMER C1 RCLKF FIMB0 TIMER C0 TCLKF digi.com Rabbit 6000 User’s Manual...
Page 146: Block Diagram
Table 14-2. Parallel Port G Pin Alternate Input Functions External Pin Name Interrupts INT2–7 FIMB7 INT2–7 FIMB6 INT2–7 FIMB5 INT2–7 FIMB4 INT2–7 FIMB3 INT2–7 FIMB2 INT2–7 FIMB1 INT2–7 FIMB0 14.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 147: Registers
Parallel Port G pins can be synchronized to the output of Timer A1, Timer B1, or Timer B2. 14.2.3 Other Registers Register Function I2CR, I3CR, I4CR, Select a Parallel Port G pin as an external interrupt input. I5CR, I6CR, I7CR digi.com Rabbit 6000 User’s Manual...
Page 148: Interrupts
Parallel Port G, writing to PGDR will no longer change the state of the pins, and the settings of PGFR, PGALR, and PGAHR will be ignored. The other Parallel Port G registers are still valid. Refer to Chapter 33 for more details. digi.com Rabbit 6000 User’s Manual...
Page 149: Parallel Port G
Parallel Port G bit 0 alternate output 0 (FIMB0). Parallel Port G bit 0 alternate output 1 (I0). Parallel Port G bit 0 alternate output 2 (TIMER C0). Parallel Port G bit 0 alternate output 3 (TCLKF). digi.com Rabbit 6000 User’s Manual...
Page 150 Parallel Port G bit 4 alternate output 0 (FIMB4). Parallel Port G bit 4 alternate output 1 (I4). Parallel Port G bit 4 alternate output 2 (PWM0). Parallel Port G bit 4 alternate output 3 (TCLKE). digi.com Rabbit 6000 User’s Manual...
Page 151 The corresponding port bit, as an output, is open-drain. Parallel Port G Data Direction Register (PGDDR) (Address = 0x004F) Bit(s) Value Description The corresponding port bit is an input. The corresponding port bit is an output. digi.com Rabbit 6000 User’s Manual...
Page 152 4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. No pullup or pulldown resistor. 75 k pullup resistor. 75 k pulldown resistor. 75 k keeper. digi.com Rabbit 6000 User’s Manual...
Page 153: Overview
Table 15-1. Parallel Port H Pin Alternate Output Functions 16-bit Pin Name Alt Out 1 Alt Out 2 Alt Out 3 I/O Bus PWM3 SCLKC PWM2 PWM1 RCLKE PWM0 TCLKE TIMER C3 SCLKD TIMER C2 TIMER C1 RCLKF TIMER C0 TCLKF digi.com Rabbit 6000 User’s Manual...
Page 154: Block Diagram
15.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 155: Registers
PHAHR 0x0033 00000000 Port H Function Register PHFR 0x0035 00000000 Port H Drive Control Register PHDCR 0x0036 00000000 Port H Data Direction Register PHDDR 0x0037 00000000 Port Hx Control Register PExCR 0x04D8 + x xxx00000 digi.com Rabbit 6000 User’s Manual...
Page 156: Dependencies
15.2.2 Clocks All outputs on Parallel Port H are clocked by the peripheral clock. 15.2.3 Other Registers Register Function Enable 16-bit data bus. IBxER 15.2.4 Interrupts There are no interrupts associated with Parallel Port H. digi.com Rabbit 6000 User’s Manual...
Page 157: Operation
If one of the Flexible Interface Modules has been enabled to use Parallel Port H, writing to PHDR will no longer change the state of the pins, and the settings of PHFR, PHALR, and PHAHR will be ignored. The other Parallel Port H registers are still valid. Refer to Chapter 33 for more details. digi.com Rabbit 6000 User’s Manual...
Page 158: Parallel Port H
This value is reserved and must not be used. Parallel Port H bit 0 alternate output 1 (I0). Parallel Port H bit 0 alternate output 2 (TIMER C0). Parallel Port H bit 0 alternate output 3 (TCLKF). digi.com Rabbit 6000 User’s Manual...
Page 159 Table 15-1. Parallel Port H Drive Control Register (PHDCR) (Address = 0x0036) Bit(s) Value Description The corresponding port bit, as an output, is driven high and low. The corresponding port bit, as an output, is open-drain. digi.com Rabbit 6000 User’s Manual...
Page 160 4 mA output drive capability. 8 mA output drive capability. 10 mA output drive capability. 14 mA output drive capability. No pullup or pulldown resistor. 75 k pullup resistor. 75 k pulldown resistor. 75 k keeper. digi.com Rabbit 6000 User’s Manual...
Page 161: Overview
Timers A2–A7 can be used to generate baud rates for Serial Ports A–F, or they can be used as general-pur- pose timers if the dedicated baud rate timers on the Rabbit 6000 serial ports are used. Timers A8, A9, A10, and A11 serve as prescalers which determine the resolution of the input capture, PWM, quadrature decoder, and Timers B/C peripherals respectively.
Page 162 After these bits are cleared, they cannot cause an interrupt. The proper rule to follow is for the interrupt routine to handle all bits that it sees set. digi.com Rabbit 6000 User’s Manual...
Page 163: Block Diagram
16.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 164: Registers
Timer A Time Constant 11 Register TAT11R 0x00AC 00000000 Timer A Time Constant 6 Register TAT6R 0x00AD xxxxxxxx Timer A Time Constant 12 Register TAT12R 0x00AE 00000000 Timer A Time Constant 7 Register TAT7R 0x00AF xxxxxxxx digi.com Rabbit 6000 User’s Manual...
Page 165 TACSR. The interrupt request is cleared when TACSR is read. The Timer A interrupt vector is in the IIR at offset 0x0A0. It can be set as priority 1, 2, or 3 in TACR. digi.com Rabbit 6000 User’s Manual...
Page 166 A sample interrupt handler is shown below. timerA_isr:: push af ; save used registers ioi ld a, (TACSR) ; clear the interrupt request and get status ; handle all interrupts flagged in TACSR here pop af ; restore registers ipres digi.com Rabbit 6000 User’s Manual...
Page 167 Timer A9 clocked by the main Timer A clock. Timer A9 clocked by the output of Timer A12. Timer A8 clocked by the main Timer A clock. Timer A8 clocked by the output of Timer A12. digi.com Rabbit 6000 User’s Manual...
Page 168 Time constant for the Timer A counter. This time constant will take effect the next time that the Timer A counter counts down to zero. The timer counts modulo n + 1, where n is the programmed time constant. digi.com Rabbit 6000 User’s Manual...
Page 169 If there is no pending match value, the new value is loaded immediately. digi.com Rabbit 6000 User’s Manual...
Page 170 17.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 171: Registers
TBCR. TA12 may be used as a prescaler for TA11. 17.2.3 Other Registers Register Function GCSR Select peripheral clock mode. TAECR Enables selection of TA12 as prescaler for TA8-TA11. TAPR The output of TAPR drives Timers A1 and A12. digi.com Rabbit 6000 User’s Manual...
Page 172: Example Isr
; save used registers ioi ld a, (TBCSR) ; clear the interrupt request and get status ; handle all interrupts flagged in TBCSR here ; reload match register(s) if necessary pop af ; restore used registers ipres digi.com Rabbit 6000 User’s Manual...
Page 173: Register Descriptions
Timer B clocked by the output of Timer A11. Timer B interrupts are disabled. Timer B interrupt use Interrupt Priority 1. Timer B interrupt use Interrupt Priority 2. Timer B interrupt use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 174 These bits are ignored but should be written with zeros. Two MSBs of the step size for the Timer B comparator. The new compare value will be loaded into the actual comparator when the current compare detects a match. digi.com Rabbit 6000 User’s Manual...
Page 175 The current value of the two MSBs of the Timer B counter is reported. These bits are always read as zeros. Timer B Count LSB Register (TBCLR) (Address = 0x00BF) Bit(s) Value Description Read The current value of the eight LSBs of the Timer B counter is reported. digi.com Rabbit 6000 User’s Manual...
Page 176: Timerc
0x50C -> 0x50D -> 0x50E -> 0x50F -> 0x518 -> 0x519 -> 0x51A -> 0x51B -> 0x51C -> 0x51D -> 0x51E -> 0x51F -> When the DMA destination address is the TCBAR, the DMA request from Timer C is connected automati- cally to the DMA. digi.com Rabbit 6000 User’s Manual...
Page 177: Block Diagram
18.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 178: Registers
Timer C Reset 3 Low Register TCR3LR 0x051E xxxxxxxx Timer C Reset 3 High Register TCR3HR 0x051F xxxxxxxx Timer C Block Access Register TCBAR 0x00F8 xxxxxxxx Timer C Block Pointer Register TCBPR 0x00F9 00000010 digi.com Rabbit 6000 User’s Manual...
Page 179: Dependencies
The output of TAPR drives Timers A1 and A12. 18.2.4 Interrupts A Timer C interrupt is enabled in TCCR, and will occur whenever the count limit value is reached. The interrupt request is cleared when TCCSR is read. digi.com Rabbit 6000 User’s Manual...
Page 180: Operation
A sample interrupt handler is shown below. timerC_isr:: push af ; save used registers ioi ld a, (TCCSR) ; clear the interrupt request and get status ; handle all interrupts flagged in TCCSR here pop af ; restore used registers ipres digi.com Rabbit 6000 User’s Manual...
Page 181: Register Descriptions
The eight LSBs of the divider limit value for Timer C are stored. Timer C Divider High Register (TCDHR) (Address = 0x0503) Bit(s) Value Description The eight MSBs of the divider limit value for Timer C are stored. digi.com Rabbit 6000 User’s Manual...
Page 182 Timer C Reset x High Register (TCR0HR) (Address = 0x050B) (TCR1HR) (Address = 0x050F) (TCR2HR) (Address = 0x051B) (TCR3HR) (Address = 0x051F) Bit(s) Value Description Eight MSBs of the match value to reset Timer C Output x. digi.com Rabbit 6000 User’s Manual...
Page 183 Timer C register address in the sequence. Timer C Block Pointer Register (TCBPR) (Address = 0x00F9) Bit(s) Value Description These bits always read as 0x0. Five least significant bits of the Timer C register address for indirect access. digi.com Rabbit 6000 User’s Manual...
Page 184: Serial Portsa - D
All four common SPI clock modes are supported, and the bit order of the data may be either MSB or LSB first. The transmit and receive operations are under program control as well. Figure 19.1 Serial Ports A – D Operation in Clocked Serial Mode digi.com Rabbit 6000 User’s Manual...
Page 185 NOTE: The maximum external serial clock rate for the SPI port is 1/6 of the peripheral clock rate. digi.com Rabbit 6000 User’s Manual...
Page 186: Block Diagram
19.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 187: Registers
0xx00000 Serial Port D Control Register SDCR 0x00F4 xx000000 Serial Port D Extended Register SDER 0x00F5 00000000 Serial Port D Divider Low Register SDDLR 0x00F6 xxxxxxxx Serial Port D Divider High Register SDDHR 0x00F7 0xxxxxxx digi.com Rabbit 6000 User’s Manual...
Page 188: Dependencies
The data clocks for Serial Ports A – D are based on the peripheral clock and are divided by either a Timer A divider or a dedicated 15-bit divider. In either case, the overall clock divider will be the value in the selected register plus one. digi.com Rabbit 6000 User’s Manual...
Page 189: Other Registers
Serial Port C at offset 0x0E0 • Serial Port D at offset 0x0F0 Each of them can be set as Priority 1, 2, or 3 in SxCR, where x is A – D for the four serial ports. digi.com Rabbit 6000 User’s Manual...
Page 190: Operation
; interrupt done: pop af ; restore used registers ipres To transmit with a “1” address bit appended, write the data to SxAR instead of SxDR; to append a “0” address bit write to SxLR instead. digi.com Rabbit 6000 User’s Manual...
Page 191: Clocked Serial Mode
The following steps explain how to set up Serial Ports A – D for the clocked serial mode. When the inter- nal clock is selected, the Rabbit 6000 is in control of all transmit and receive operations. When an external clock is selected the other device controls all transmit and receive operation.
Page 192 ; get next byte to be transmitted into Register A here ; load TX buffer with next byte, clear interrupt, and start ;transmission ioi ld (SBAR), a done: pop af ; restore used registers ipres digi.com Rabbit 6000 User’s Manual...
Page 193: Register Descriptions
(Address = 0x00E2) (SDLR) (Address = 0x00F2) Bit(s) Value Description Read Returns the contents of the receive buffer. Loads the transmit buffer with an address byte, marked with a “one” Write address bit, for transmission. digi.com Rabbit 6000 User’s Manual...
Page 194 The transmitter is sending a byte. An interrupt may be generated when the transmitter clears this bit, which occurs only if the transmitter is ready to start sending another byte and the transmit buffer is empty. These bits are always zero in the asynchronous mode. digi.com Rabbit 6000 User’s Manual...
Page 195 The transmitter is sending a byte. An interrupt is generated when the transmitter clears this bit, which occurs only if the transmitter is ready to start sending another byte but the transmit buffer is empty. Normal clocked serial transmit (command per byte). digi.com Rabbit 6000 User’s Manual...
Page 196 Clocked serial mode with external clock. Clocked serial mode with internal clock. The serial port interrupt is disabled. The serial port uses Interrupt Priority 1. The serial port uses Interrupt Priority 2. The serial port uses Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 197 Continue character assembly during break to allow timing the break condition. Inhibit character assembly during break. One character (all zeros, with framing error) at start and one character (garbage) at completion. This bit is ignored in the asynchronous mode. digi.com Rabbit 6000 User’s Manual...
Page 198 (Address = 0x00F6) Bit(s) Value Description Eight LSBs of the divider that generates the serial clock for this channel. This divider is not used unless the MSB of the corresponding SxDHR is set to one. digi.com Rabbit 6000 User’s Manual...
Page 199 Enable the serial port divider, and use its output to clock the serial port. The serial port divider counts modulo n + 1 and is clocked by the peripheral clock. Seven MSBs of the divider that generates the serial clock for this channel. digi.com Rabbit 6000 User’s Manual...
Page 200: Serial Portse - F
(FM0), and biphase-mark (FM1). IrDA-compliant RZI encoding is also available in HDLC mode; it reduces the bit widths to ¼ the normal width, which allows the serial- port signal to be connected directly to an IrDA transceiver. digi.com Rabbit 6000 User’s Manual...
Page 201: Block Diagram
(DPLL). The timing of this synchro- nization is adjusted with each incoming transition, allowing for tracking if the two external clocks differ slightly in frequency. For more on the clock synchronization and data encoding, see Section 20.3.3. 20.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 202: Registers
Serial Port F Status Register SFCR 0x00DC xx000000 Serial Port F Control Register SFER 0x00DD 00000000 Serial Port F Extended Register SFDLR 0x00DE xxxxxxxx Serial Port F Divider Low Register SFDHR 0x00DF 0xxxxxxx Serial Port F Divider High Register digi.com Rabbit 6000 User’s Manual...
Page 203: Dependencies
Serial Port F baud rate generation PCFR, PCAHR, PCALR PDFR, PDAHR, PDALR Alternate port output selection PEFR, PEAHR, PEALR PHFR, PHAHR, PHALR TAT1R Prescaler for TAT2R-TAT3R Prescaler for TAT1R TAPR TACR Input selection for TAT2R-TAT3R digi.com Rabbit 6000 User’s Manual...
Page 204: Interrupts
• Serial Port E at offset 0x1C0 • Serial Port F at offset 0x1D0 Each of them can be set as Priority 1, 2, or 3 in SxCR, where x is E – F for the two serial ports. digi.com Rabbit 6000 User’s Manual...
Page 205: Operation
(i.e., it is not addressed to this device), writing a 01 to bits 6–7 of SxCR will force the receiver back into the flag search mode. digi.com Rabbit 6000 User’s Manual...
Page 206: More On Clock Synchronization And Data Encoding
Last Byte Bit Pattern Valid Data Bits bbbbbbb0 bbbbbb01 bbbbb011 bbbb0111 bbb01111 bb011111 b0111111 digi.com Rabbit 6000 User’s Manual...
Page 207 DPLL output clock rate must be very small, and depends on the longest possible run of zeros in the received frame. NRZI encoding guarantees at least one transition every six bits (with the inserted zeros). Since the DPLL can adjust by two digi.com Rabbit 6000 User’s Manual...
Page 208 • In the biphase-level mode this means the transition that defines the last zero of the closing flag. • In the biphase-mark and the biphase-space modes this means the transition that defines the end of the last zero of the closing flag. digi.com Rabbit 6000 User’s Manual...
Page 209 Decoding biphase-level data requires that the data be sampled at either the quarter or three-quarter point in the bit cell. The DPLL here uses the quarter point to sample the data. digi.com Rabbit 6000 User’s Manual...
Page 210: Register Descriptions
(Address = 0x00CA) (SFLR) (Address = 0x00DA) Bit(s) Value Description Read Returns the contents of the receive buffer. Loads the transmit buffer with an address byte, marked with a “one” address bit, Write for transmission. digi.com Rabbit 6000 User’s Manual...
Page 211 The transmitter is sending a byte. An interrupt is generated when the transmitter clears this bit, which occurs only if the transmitter is ready to start sending another byte and the transmit buffer is empty. These bits are always zero in the asynchronous mode. digi.com Rabbit 6000 User’s Manual...
Page 212 The transmitter finished sending a closing flag. Data written in response to this interrupt will cause at least two flags to be transmitted between frames. The byte in the receiver buffer is 8 bits. The byte in the receiver buffer is less than 8 bits. digi.com Rabbit 6000 User’s Manual...
Page 213 If necessary, the receiver and transmitter clocks can be output via parallel port pins. The serial port interrupt is disabled. The serial port uses Interrupt Priority 1. The serial port uses Interrupt Priority 2. The serial port uses Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 214 Continue character assembly during break to allow timing the break condition. Inhibit character assembly during break. One character (all zeros, with framing error) at start and one character (garbage) at completion. This bit is ignored in the asynchronous mode. digi.com Rabbit 6000 User’s Manual...
Page 215 Enable the serial port divider, and use its output to clock the serial port. The serial port divider counts modulo n + 1 and is clocked by the peripheral clock. Seven MSBs of the divider that generates the serial clock for this channel. digi.com Rabbit 6000 User’s Manual...
Page 216: Slave Port
The slave port can be used to bootstrap the processor by setting the SMODE pins appropriately. See Chapter 3 for more information on this mode. If a Rabbit is used as the master device as well as the slave, the recommended bus interface for the master to use is the External I/O bus.
Page 217: Block Diagram
Slave Port Data 0 Register SPD0R 0x0020 xxxxxxxx Slave Port Data 1 Register SPD1R 0x0021 xxxxxxxx Slave Port Data 2 Register SPD2R 0x0022 xxxxxxxx Slave Port Status Register SPSR 0x0023 00000000 Slave Port Control Register SPCR 0x0024 0xx00000 digi.com Rabbit 6000 User’s Manual...
Page 218: Dependencies
The slave port interrupt vector is in the IIR at offset 0x080. It can be set as Priority 1, 2, or 3 by writing to SPCR. digi.com Rabbit 6000 User’s Manual...
Page 219: Operation
21.3 Operation Figure 21.1 shows a typical slave port connection between a Rabbit processor as the master and two slaves. Figure 21.1 Master/Slave Port Connections digi.com Rabbit 6000 User’s Manual...
Page 220: Master Setup
/SLVATTN (from Slave #2) Note that the slave port on the master Rabbit processor is not used; the master uses the data bus to send and receive data to the slave port data registers on the slave devices. In this setup, pins PD6 and PD7 are set up as chip selects for the two slave devices, and PE0 and PE1 are used as external interrupt inputs to monitor the /SLVATTN signals from the slaves.
Page 221: Master/Slave Communication
(SPD1R), a ld a, (to_mas_d0) ioi ld (SPD0R), a ; this write asserts /SLVATTN ; the interrupt request is cleared by any read/write of the ; registers pop af ; restore used registers ipres digi.com Rabbit 6000 User’s Manual...
Page 222: Other Configurations
Similarly, it is possible to receive a scrambled value from a data register if it is read while being written. The protocol used should take account of this and prevent it from occurring (the protocol described above guarantees this will not occur). digi.com Rabbit 6000 User’s Manual...
Page 223: Timing Diagrams
/SWR High to /SRD Low Setup — SRD) Time Tw(SWR) /SWR Low Pulse Width — Tsu(SD) SD Setup Time — Th(SD) SD Hold Time — Tsu(SRD – /SRD High to /SWR Low Setup — SWR) Time digi.com Rabbit 6000 User’s Manual...
Page 224 Figure 21.2 shows the sequence of events when the master reads/writes the slave port registers. Figure 21.2 Slave Port R/W Timing Diagram digi.com Rabbit 6000 User’s Manual...
Page 225: Register Descriptions
Slave port write byte 2 is full. Slave port write byte 1 is empty. Slave port write byte 1 is full. Slave port write byte 0 is empty. Slave port write byte 0 is full. digi.com Rabbit 6000 User’s Manual...
Page 226 Parallel Port B[7:0] is used for the address bus. Slave port interrupts are disabled. Slave port interrupts use Interrupt Priority 1. Slave port interrupts use Interrupt Priority 2. Slave port interrupts use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 227: Wi-Fi Analog Components
I/O pin or divide the peripheral clock by a value between 2 and 256. The Rabbit 6000 also has a dedicated 1 megasamples/s, 12-bit A/D converter with an 8-way multiplexer, and is described in Chapter 23.
Page 228 -0.2V to 1.45V Compliance Range Operating Current Active 13 mA @ 2.5 V Standby 0.7 mA @ 2.5V Power down < 1 µA @ 2.5 V Nonlinearity ±0.5 LSB typ. Differential (DNL) ±1 LSB typ. Integral (INL) digi.com Rabbit 6000 User’s Manual...
Page 229 0.1 x VCC33A to 0.9 x VCC33A Single-ended Wi-Fi slow A/D converter Operating Current Active 5 mA @ 3.3 V Standby < 10 µA @ 3.3 V Nonlinearity ±0.8 LSB typ. Differential (DNL) ±2 LSB typ. Integral (INL) digi.com Rabbit 6000 User’s Manual...
Page 230: Block Diagram
22.2 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 231: Registers
256, or by a clock input on PD4, PD5, or PD6, depending on the component. Exercise care when select- ing the clock to keep the data rate below the maximum sample rate of the component you are configuring. digi.com Rabbit 6000 User’s Manual...
Page 232: Operation
4. For faster update, an 8-bit value can be obtained by only reading A2MR. 5. To reduce power consumption, the slow A/D converter can be put into a sleep mode by writing to A2CR. digi.com Rabbit 6000 User’s Manual...
Page 233: Sample Circuits
— we obtained good results with ferrite beads rated at 120  at 100 MHz. Also note that a common ground plane is used; better results may be expected if a separate analog ground plane is laid out. Figure 22.1 Sample Fast A/D Converter Circuit Figure 22.2 Sample Fast D/A Converter Circuit digi.com Rabbit 6000 User’s Manual...
Page 234 Figure 22.3 Sample Slow A/D Converter Circuit digi.com Rabbit 6000 User’s Manual...
Page 235: Register Descriptions
Analog Component 0 Q MSB Register (A0QMR) (Address = 0x0803) Bit(s) Value Description The current value of the eight most-significant bits of the fast A/D Read converter are returned. Write Writes to this register are ignored. digi.com Rabbit 6000 User’s Manual...
Page 236 D/A converter until the Write corresponding MSB register is written to guarantee that the full 10 bits are valid. Read These bits always return zeros when read. These bits are ignored and will always return zeros when read. digi.com Rabbit 6000 User’s Manual...
Page 237 Fast D/A converter uses 2’s compliment coding. Fast D/A converter uses binary encoding. Fast D/A converter powered down. Fast D/A converter in sleep mode. This bit combination is reserved and should not be used. Fast D/A converter active. digi.com Rabbit 6000 User’s Manual...
Page 238 Analog Component 2 MSB Register (A2MR) (Address = 0x0821) Bit(s) Value Description The current value of the eight most-significant bits of the slow A/D Read converter are returned. Write Writes to this register are ignored. digi.com Rabbit 6000 User’s Manual...
Page 239 Conversion not complete. (Read- Conversion complete. only) No effect on slow A/D converter. (Write- Start conversion. only) This bit is reserved and should be written as zero. Slow A/D converter in sleep mode. Slow A/D converter active. digi.com Rabbit 6000 User’s Manual...
Page 240: Analog/Digital Converter
ONVERTER 23.1 Overview The Rabbit 6000 has a 1 megasamples/s, 12-bit A/D converter with a separate 8-channel multiplexer avail- able at all times. Each individual multiplexer channel can be read separately. Note that use of the multiplexer reduces the effective accuracy to 11 bits.
Page 241: Block Diagram
ADC Command/Status Register ADCCSR 0x0543 00000000 ADC Control Register ADCCR 0x0544 00000000 ADC x LSB Register ADCxLR 0x0550 + 2*x 00000000 ADC x MSB Register ADCxMR 0x0551 + 2*x 00000000 NOTE: x = Mux channel number (0-7). digi.com Rabbit 6000 User’s Manual...
Page 242: Dependencies
The A/D converter can be clocked by the peripheral clock divided by 2, 4, 8, 16, 32, 64, 128, or 256, or by a clock input on PD4, depending on the value set in ADCCR. Exercise care when selecting the clock to keep the data rate below the maximum sample rate of the component you are configuring. digi.com Rabbit 6000 User’s Manual...
Page 243: Operation
The following actions occur within the interrupt service routine. • Read ADCLR to get the 4 least-significant bits of the result and clear the interrupt flag. • Read ADCMR to get the 8 most-significant bits of the result. digi.com Rabbit 6000 User’s Manual...
Page 244: Sample Circuit
A sample circuit is shown below for the analog components. For more information about possible post- multiplexer/pre-A/D converter filtering circuits, please contact your sales representative at Digi International. Figure 23.1 Sample Multiplexed A/D Converter Circuit digi.com Rabbit 6000 User’s Manual...
Page 245: Register Descriptions
(Address = 0x0541) Bit(s) Value Description The current values of the 8 most-significant bits of the multiplexed A/D Read converter channel are returned. The channel is selected in ADCCSR. Write Writes to this register are ignored. digi.com Rabbit 6000 User’s Manual...
Page 246 No conversion start. This bit always returns zero during read. Start conversion command, using the accompanying channel selection. This command is ignored while in the continuous conversion mode. This command can by issued while another conversion is running for maximum throughput. digi.com Rabbit 6000 User’s Manual...
Page 247 Multiplexed A/D converter powered down. Multiplexed A/D converter active. Multiplexed A/D converter interrupt is disabled. Multiplexed A/D converter uses Interrupt Priority 1. Multiplexed A/D converter uses Interrupt Priority 2. Multiplexed A/D converter uses Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 248 (ADC6MR) (Address = 0x055D) (ADC7MR) (Address = 0x055F) Bit(s) Value Description The current values of the 8 most-significant bits of the multiplexed A/D Read converter channel are returned. Write Writes to this register are ignored. digi.com Rabbit 6000 User’s Manual...
Page 249: Dma Channels
HANNELS 24.1 Overview There are 16 independent DMA channels on the Rabbit 6000. All 16 channels are identical, and are capable of transferring data between memory, external I/O, or internal I/O. The priority among the channels can be either fixed or rotating, and the DMA use of the external bus can be limited to guarantee interrupt latency or CPU throughput.
Page 250 “initial address” that points to the first buffer descriptor in memory and allows the DMA channel to rewind itself automatically in the case of a transmit retry by the network port. Each buffer descriptor contains a digi.com Rabbit 6000 User’s Manual...
Page 251 DMA activ- ity during execution. Note that a simultaneous interrupt request and DMA transfer request will be resolved in favor of the DMA transfer request. digi.com Rabbit 6000 User’s Manual...
Page 252: Block Diagram
Normally all DMA transfers are flow-through, meaning that the DMA does separate read and write trans- actions to transfer the data. However, the Rabbit 6000 DMA also contains dedicated buses to support fly- by transactions to and from certain internal I/O addresses on the Ethernet, Wi-Fi, and USB peripherals. A fly-by transfer looks like a single transaction on the internal and external bus, where data are transferred directly to/from the peripheral from/to a memory device.
Page 253: Registers
DMA y Buffer Length [7:0] Register DyL0R 0x0182 * xxxxxxxx DMA y Buffer Length [15:8] Register DyL1R 0x0183 * xxxxxxxx DMA y Source Address [7:0] Register DySA0R 0x0184 * xxxxxxxx DMA y Source Address [15:8] Register DySA1R 0x0185 * xxxxxxxx digi.com Rabbit 6000 User’s Manual...
Page 254 DMA y Source Address [23:16] Register 0x01v6 0x09y6 DMA y Destination Addr [7:0] Register 0x01v8 0x09y8 DMA y Destination Addr [15:8] Register 0x01v9 0x09y9 DMA y Destination Addr [23:16] Register 0x01vA 0x09yA DMA y Link Address [7:0] Register 0x01vC 0x09yC digi.com Rabbit 6000 User’s Manual...
Page 255: Dependencies
The DMA interrupt vectors are in the EIR starting at offsets 0x080–0x0F0 for DMA Channels 0 to 7, and 0x180–0x1F0 for DMA Channels 8 to 15. They can be set as Priority 1, 2, or 3. digi.com Rabbit 6000 User’s Manual...
Page 256: Operation
DMR1CR. Make sure that the pin selected is set up as an input. Note that this enable will be logi- cal-ANDed to any internal DMA enables if the DMA transfer is to/from an internal peripheral. digi.com Rabbit 6000 User’s Manual...
Page 257: Handling Interrupts
4 of DyCR set. 24.3.2 Example ISR A sample interrupt handler is shown below. dma_isr:: push af ; do something with the data in the current buffer ; the interrupt request is automatically cleared pop af ipres digi.com Rabbit 6000 User’s Manual...
Page 258: Dma Priority With The Processor
Table 24-4 shows the effective number of clock cycles required per burst, assuming a single DMA channel transfer, 8-bit memory, and no wait states. Access via 16-bit memory would provide up to twice the throughput, depending on the address alignment. digi.com Rabbit 6000 User’s Manual...
Page 259: Dma Channel Priority
It is possible to control the priority between separate DMA channels. There are three channel-priority options in the Rabbit 6000. The first is fixed priority after every byte where the priority of each channel is equal to its number, i.e., if both DMA Channels 3 and 4 have a pending transfer request, DMA Channel 4 will always be enabled first.
Page 260: Buffer Descriptor Modes
By using these options in various ways, the Rabbit 6000 DMA can be operated in a number of conventional DMA modes. The most common options are described here; others are certainly possible by different use of the available linking methods.
Page 261 A linked list is similar to a buffer array, except that 16-byte descriptors are used and the descriptors are not necessarily adjacent in memory. The advantage of this mode is the ability to spread descriptors. digi.com Rabbit 6000 User’s Manual...
Page 262 (which can be located anywhere in memory). This method could be useful where a message is broken down into separate transfers, but entire messages could be scattered/gathered from anywhere in memory. digi.com Rabbit 6000 User’s Manual...
Page 263: Dma With Peripherals
DMA to update the settings of these peripherals at some desired rate. This allows complex PWM waveforms to be generated by using the DMA timed request to update the PWM duty cycles at regular intervals. digi.com Rabbit 6000 User’s Manual...
Page 264: Register Descriptions
The corresponding DMA channel (7-0) is enabled and active. These bits are set (rd-only) by the Start command and remain set until the completion of the last buffer or receipt of a Halt command. digi.com Rabbit 6000 User’s Manual...
Page 265 (Address = 0x0121) Bit(s) Value Description No effect on the corresponding DMA channel (15–8). Halt the corresponding DMA channel (15–8). The DMA registers retain the current state, and the DMA can be restarted using DMCSMR. digi.com Rabbit 6000 User’s Manual...
Page 266 DMA transfers at Priority 2. No DMA transfers while CPU operates at Priority 3. DMA transfers at Priority 3. DMA transfers at any time. DMA interrupts are disabled. DMA interrupts use Interrupt Priority 1. DMA interrupts use Interrupt Priority 2. DMA interrupts use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 267 Minimum 16 clocks between bursts. Minimum 24 clocks between bursts. Minimum 32 clocks between bursts. Minimum 64 clocks between bursts. Minimum 128 clocks between bursts. Minimum 256 clocks between bursts. Minimum 512 clocks between bursts. digi.com Rabbit 6000 User’s Manual...
Page 268 External DMA Request 0 supplied to DMA Channel 12. 1101 External DMA Request 0 supplied to DMA Channel 13. 1110 External DMA Request 0 supplied to DMA Channel 14. 1111 External DMA Request 0 supplied to DMA Channel 15. digi.com Rabbit 6000 User’s Manual...
Page 269 External DMA Request 1 supplied to DMA Channel 12. 1101 External DMA Request 1 supplied to DMA Channel 13. 1110 External DMA Request 1 supplied to DMA Channel 14. 1111 External DMA Request 1 supplied to DMA Channel 15. digi.com Rabbit 6000 User’s Manual...
Page 270 Timed DMA request supplied to DMA Channel 15. DMA Timed Request Divider Low Register (DTRDLR) (Address = 0x0116) Bit(s) Value Description The eight LSBs of the limit value for the DMA timed request timer are Write stored. digi.com Rabbit 6000 User’s Manual...
Page 271 Maximum four transfers per burst. Maximum eight transfers per burst. Maximum sixteen transfers per burst. Maximum thirty-two transfers per burst. Maximum sixty-four transfers per burst. These bits are reserved and should be written with zeros. digi.com Rabbit 6000 User’s Manual...
Page 272 (Address = 0x0928) (D11TBR) (Address = 0x0938) (D12TBR) (Address = 0x0948) (D13TBR) (Address = 0x0958) (D14TBR) (Address = 0x0968) (D15TBR) (Address = 0x0978) Bit(s) Value Description Byte value that, if matched, will terminate a buffer. digi.com Rabbit 6000 User’s Manual...
Page 273 A zero in a bit position disables the corresponding bit from contributing to the termination condition. A value of all zeros in this register disables the termination-byte match feature. digi.com Rabbit 6000 User’s Manual...
Page 274 (D11BU1R) (Address = 0x093B) (D12BU1R) (Address = 0x094B) (D13BU1R) (Address = 0x095B) (D14BU1R) (Address = 0x096B) (D15BU1R) (Address = 0x097B) Bit(s) Value Description Bits 15:8 of the buffer unused-length value are stored in this register. digi.com Rabbit 6000 User’s Manual...
Page 275 (Address = 0x092D) (D11IA1R) (Address = 0x093D) (D12IA1R) (Address = 0x094D) (D13IA1R) (Address = 0x095D) (D14IA1R) (Address = 0x096D) (D15IA1R) (Address = 0x097D) Bit(s) Value Description Bits 15:8 of the initial address are stored in this register. digi.com Rabbit 6000 User’s Manual...
Page 276 (Address = 0x092E) (D11IA2R) (Address = 0x093E) (D12IA2R) (Address = 0x094E) (D13IA2R) (Address = 0x095E) (D14IA2R) (Address = 0x096E) (D15IA2R) (Address = 0x097E) Bit(s) Value Description Bits 23:16 of the initial address are stored in this register. digi.com Rabbit 6000 User’s Manual...
Page 277 Disconnect source DMA request. DMA will transfer full buffer size. Normal source address. Source address fixed, independent of type. Auto-connect destination DMA request. Disconnect destination DMA request (full buffer transfer). Normal destination address. Destination address fixed, independent of type. digi.com Rabbit 6000 User’s Manual...
Page 278 Source address is memory (three-byte) address, auto-increment. Destination address is fixed internal I/O (two-byte) address. Destination address is fixed external I/O (two-byte) address. Destination address is memory (three-byte) address, auto-decrement. Destination address is memory (three-byte) address, auto-increment. digi.com Rabbit 6000 User’s Manual...
Page 279 (D11L1R) (Address = 0x09B3) (D12L1R) (Address = 0x09C3) (D13L1R) (Address = 0x09D3) (D14L1R) (Address = 0x09E3) (D15L1R) (Address = 0x09F3) Bit(s) Value Description Bits 15:8 of the buffer length value are stored in this register. digi.com Rabbit 6000 User’s Manual...
Page 280 (Address = 0x09A5) (D11SA1R) (Address = 0x09B5) (D12SA1R) (Address = 0x09C5) (D13SA1R) (Address = 0x09D5) (D14SA1R) (Address = 0x09E5) (D15SA1R) (Address = 0x09F5) Bit(s) Value Description Bits 15:8 of the source address are stored in this register. digi.com Rabbit 6000 User’s Manual...
Page 281 (Address = 0x09A8) (D11DA0R) (Address = 0x09B8) (D12DA0R) (Address = 0x09C8) (D13DA0R) (Address = 0x09D8) (D14DA0R) (Address = 0x09E8) (D15DA0R) (Address = 0x09F8) Bit(s) Value Description Bits 7:0 of the destination address are stored in this register. digi.com Rabbit 6000 User’s Manual...
Page 282 (Address = 0x09AA) (D11DA2R) (Address = 0x09BA) (D12DA2R) (Address = 0x09CA) (D13DA2R) (Address = 0x09DA) (D14DA2R) (Address = 0x09EA) (D15DA2R) (Address = 0x09FA) Bit(s) Value Description Bits 23:16 of the destination address are stored in this register. digi.com Rabbit 6000 User’s Manual...
Page 283 (Address = 0x09AD) (D11LA1R) (Address = 0x09BD) (D12LA1R) (Address = 0x09CD) (D13LA1R) (Address = 0x09DD) (D14LA1R) (Address = 0x09ED) (D15LA1R) (Address = 0x09FD) Bit(s) Value Description Bits 15:8 of the link address are stored in this register. digi.com Rabbit 6000 User’s Manual...
Page 284 (Address = 0x09AE) (D11LA2R) (Address = 0x09BE) (D12LA2R) (Address = 0x09CE) (D13LA2R) (Address = 0x09DE) (D14LA2R) (Address = 0x09EE) (D15LA2R) (Address = 0x09FE) Bit(s) Value Description Bits 23:16 of the link address are stored in this register. digi.com Rabbit 6000 User’s Manual...
Page 285: 100Base-T Ethernet
Character assembly begins at this point, and each byte is transferred to the receive FIFO. However, no interrupt or DMA request will occur until after the first six bytes of the frame have been received and checked for an address match. digi.com Rabbit 6000 User’s Manual...
Page 286 There is a dedicated 2.5 V regulator in the Rabbit 6000 to power the Ethernet PHY. Several pins come off the chip to allow for bypass capacitors. The regulator is disabled if Network Port B is disabled.
Page 287: Block Diagram
25.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 288: Registers
Network Port B Direct MII Register NBDMR 0x022A xxxxxxxx Network Port B Configuration 0 Register NBCF0R 0x0240 00000000 Network Port B Configuration 1 Register NBCF1R 0x0241 00000000 Network Port B Configuration 2 Register NBCF2R 0x0242 00000000 digi.com Rabbit 6000 User’s Manual...
Page 289 Network Port B Station Address 2 Register NBSA2R 0x0262 00000000 Network Port B Station Address 3 Register NBSA3R 0x0263 00000000 Network Port B Station Address 4 Register NBSA4R 0x0264 00000000 Network Port B Station Address 5 Register NBSA5R 0x0265 00000000 digi.com Rabbit 6000 User’s Manual...
Page 290: Dependencies
For optimal power reduction, the XTL_25MO pin should be attached to the ETH_2.5V signal if the external 25 MHz clock interface is not used. 25.2.3 Other Registers Register Function Select shared or external 25 MHz clock. MSCR Reset PHY. ENPR Enable 10/100 Ethernet functionality. digi.com Rabbit 6000 User’s Manual...
Page 291: Interrupts
3. Write the interrupt vector for the interrupt service routine to the external interrupt table. 4. Select the desired interrupts and interrupt priority by writing to NBCSR. 5. Select the MII interface settings by writing to NBMCFR, NBMRAR, and NBMPAR. digi.com Rabbit 6000 User’s Manual...
Page 292: Transmit
4. The packet transmission will proceed automatically when data come in. When the DMA trans- fer is complete, the DMA interrupt can be used to start the packet processing. The status of the received packet is appended to the received data. digi.com Rabbit 6000 User’s Manual...
Page 293: Handling Interrupts
; handle transmit pause pop af ipres A sample packet receive interrupt handler is shown below. dma_eth_rx_isr:: ; interrupt is automatically cleared ; check status bytes appended to packet just received ipres digi.com Rabbit 6000 User’s Manual...
Page 294: Multicast Addressing
0x5F 0x43 0x4D 0x51 0xCD 0xD1 0xDF 0xC3 NBMF2R 0x91 0x8D 0x83 0x9F 0x03 0x1F 0x11 0x0D NBMF1R 0x87 0x9B 0x95 0x89 0x15 0x09 0x07 0x1B NBMF0R 0x49 0x55 0x5B 0x47 0xDB 0xC7 0xC9 0xD5 digi.com Rabbit 6000 User’s Manual...
Page 295: Register Descriptions
Frame transmission not too long. Frame transmission too long. No excessive defers. Frame transmission deferred excessively. No collisions. Frame transmission encountered at least one collision. No late collisions. Frame transmission encountered a late collision (later than one slot time). digi.com Rabbit 6000 User’s Manual...
Page 296 This bit is reserved and will always read as zero. The Network Port interrupt is disabled. The Network Port uses Interrupt Priority 1. The Network Port uses Interrupt Priority 2. The Network Port uses Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 297 (Address = 0x0208) Bit(s) Value Description LSB of parameter sent in PAUSE control frame. Network Port B Transmit Pause MSB Register (NBTPMR) (Address = 0x0209) Bit(s) Value Description MSB of parameter sent in PAUSE control frame. digi.com Rabbit 6000 User’s Manual...
Page 298 Receive frames with broadcast address accepted Receive frames with multicast addresses ignored. Receive frames with multicast addresses accepted if passing hashing filter. Receive frames with mismatched physical addresses are ignored. Receive frames with any physical address accepted. Promiscuous mode. digi.com Rabbit 6000 User’s Manual...
Page 299 CRC are used as an index into this 64-bit Write table. If the corresponding bit is zero, the frame is discarded. If the corresponding bit is one, the frame is accepted. digi.com Rabbit 6000 User’s Manual...
Page 300 These bits are ignored and will always return zeros when read. No operation. Reset MAC control sublayer/receive domain logic. No operation. Reset receiver. No operation. Reset MAC control sublayer/transmit domain logic. No operation. Reset transmitter. digi.com Rabbit 6000 User’s Manual...
Page 301 Enable immediate retransmit (no back-off). These bits are ignored and will always return zeros when read. Disable preamble length limit checking. Enable preamble length limit checking (12 bytes or less only). Disable preamble checking. Enable preamble checking. digi.com Rabbit 6000 User’s Manual...
Page 302 Network Port B Collision Window Register (NBCWR) (Address = 0x0249) Bit(s) Value Description These bits are ignored and will always return zero when read. Collision window (slot time). Default (and value specified by 802.3) is 0x37. digi.com Rabbit 6000 User’s Manual...
Page 303 MII Management Clock is system clock divided by 20. MII Management Clock is system clock divided by 40. MII Management Clock is system clock divided by 80. Enable MII frame preambles. Disable MII frame preambles. Disable MII scan function. Enable MII scan function. digi.com Rabbit 6000 User’s Manual...
Page 304 Value Description These bits are ignored and will always return zeros when read. MII PHY address. Network Port B MII Write LSB Register (NBMWLR) (Address = 0x0256) Bit(s) Value Description LSB of MII write data. digi.com Rabbit 6000 User’s Manual...
Page 305 MII read data valid. MII read data not valid. MII not busy scanning. MII scan operation in progress. MII not busy performing a read or write cycle. MII busy performing a read or write cycle. digi.com Rabbit 6000 User’s Manual...
Page 306 (NBSA0R) (Address = 0x0260) (NBSA1R) (Address = 0x0261) (NBSA2R) (Address = 0x0262) (NBSA3R) (Address = 0x0263) (NBSA4R) (Address = 0x0264) (NBSA5R) (Address = 0x0265) Bit(s) Value Description Byte of physical address for transmit control frames. digi.com Rabbit 6000 User’s Manual...
Page 307 This bit combination is reserved and should not be used. FIMA clock from system PLL output. Response to this setting may be delayed until the PLL output is stable (roughly 200 µs after enabling the system PLL, uses 32 kHz clock to generate delay). digi.com Rabbit 6000 User’s Manual...
Page 308 Network Port D interrupts use Interrupt Priority 3. Network Port C interrupts are disabled. Network Port C interrupts use Interrupt Priority 1. Network Port C interrupts use Interrupt Priority 2. Network Port C interrupts use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 309: Overview
Up to four expanded keys can be stored in the peripheral at one time. There is a dedicated 2.5 V regulator in the Rabbit 6000 to power the Wi-Fi D/A converter. Several pins come off the chip to allow for bypass capacitors. The regulator is disabled if Network Port C is disabled.
Page 310: Block Diagram
26.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 311: Registers
Network Port C Configuration-1 Register 3 NCC1R3 0x0A2B 10000000 Network Port C Configuration-2 Register 0 NCC2R0 0x0A2C 00010100 Network Port C Configuration-2 Register 1 NCC2R1 0x0A2D 10110011 Network Port C Configuration-2 Register 2 NCC2R2 0x0A2E 10000010 digi.com Rabbit 6000 User’s Manual...
Page 312 Network Port C Remaining Backoff 1 Register NCRBO1R 0x0A6B xxxxxxxx Network Port C Beacon Filter Register NCBFR 0x0A6D xxxxxxxx Network Port C Beacon Backoff 0 Register NCBBO0R 0x0A6E xxxxxxxx Network Port C Beacon Backoff 1 Register NCBBO1R 0x0A6F xxxxxxxx digi.com Rabbit 6000 User’s Manual...
Page 313: Dependencies
Bandgap voltage (unused) Bias resistor for Wi-Fi A/D AD_RSET — converter (12.1 k to ground optimal). Bias Bias resistor for Wi-Fi D/A DA_RSET — converter (9.1 k to ground optimal). COMP — Connect to Wi-Fi_2.5V. digi.com Rabbit 6000 User’s Manual...
Page 314: Clocks
The interface for Wi-Fi peripheral does not run at the CPU frequency, but instead uses the 80MHz Wi-Fi clock. This means that Wait states are usually necessary when accessing it from the Rabbit 6000. The Net- work Port C CPU Wait Register (NCCWR) provides a five-bit field for selecting Wait states for CPU accesses.
Page 315: Other Registers
Although this 65nS cycle time limits the bus bandwidth of the Wi-Fi peripheral to 15MByte/sec, the 2K buffers for both receive and transmit data mean that this limit does not affect overall Wi-Fi throughput. 26.3.1 Other Registers Register Function ENPR Enable Wi-Fi functionality. MSSR Select crystal or external 20 MHz clock. digi.com Rabbit 6000 User’s Manual...
Page 316: Interrupts
2, or 3 by writing to ENPR. 26.4 Operation At the present time, the wireless peripheral is intended to be used only in Rabbit-branded and other prod- ucts offered by Digi International. Dynamic C has the necessary drivers. Customers wishing to incorporate the wireless peripheral in their own design should contact the sales representative at Digi International for more information.
Page 317: Usb Host
27. USB H 27.1 Overview Network Port D implements a USB 2.0 compliant host interface and PHY. The USB host in the Rabbit 6000 supports both full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s) operation. It conforms to the Open Host Controller Interface (OHCI) specification, and is fully interfaced with the Rabbit 6000 DMA. Both receive and transmit have a dedicated 2048-byte FIFO.
Page 318: Registers
The USB peripheral has a fixed 250ns access time, so wait states are usually necessary when accessing it from the Rabbit 6000. The required number of wait states can be determined by dividing 250ns by the period of the main clock and rounding up. NDWR is used to select between 0-63 wait states. The 250nS cycle time for the USB peripheral comes from the 48MHz USB clock (it is twelve cycles of this clock per access).
Page 319: Other Registers
The network port interrupt vector is located in the IIR at offset 0x110. It can be set as Priority 1, 2, or 3 by writing to ENPR. Details about what events cause interrupts are available in the OHCI specification. digi.com Rabbit 6000 User’s Manual...
Page 320: Operation
7. Enable Network Port D and select the interrupt priority by writing to ENPR. 27.3.3 Transmit and Receive Refer to the OHCI specification for transmission and reception operation. 27.3.4 Handling Interrupts Refer to the OHCI specification for details on handling interrupts. digi.com Rabbit 6000 User’s Manual...
Page 321: Register Descriptions
Network Port D (internal I/O page 0x0B) reads and writes. That is, 0x00 selects 63 wait states and 0x3F selects zero wait states. Network Port D has a minimum bus cycle time of 250 ns. digi.com Rabbit 6000 User’s Manual...
Page 322: Input Capture
The capture counter can synchronized with Timer B outputs to load parallel port output registers. This makes it possible to generate an output signal precisely synchronized with an input signal. digi.com Rabbit 6000 User’s Manual...
Page 323: Block Diagram
28.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 324: Registers
ICM1R 0x005B xxxxxxxx Input Capture Trigger 2 Register ICT2R 0x005C 00000000 Input Capture Source 2 Register ICS2R 0x005D xxxxxxxx Input Capture LSB 2 Register ICL2R 0x005E xxxxxxxx Input Capture MSB 2 Register ICM2R 0x005F xxxxxxxx digi.com Rabbit 6000 User’s Manual...
Page 325: Dependencies
Because of this, there is some delay between the input transition and when an interrupt is requested, as shown below. The status bits in ICSxR are set coincident with the interrupt request and are reset when read from the ICSxR. digi.com Rabbit 6000 User’s Manual...
Page 326: Operation
(ICCSR) ; clear the interrupt request and get status ; determine which interrupts have occurred ; if rollover, perform any necessary software counter adjustments here ; read counter values pop af ipres digi.com Rabbit 6000 User’s Manual...
Page 327: Capture Mode
5. Reading the latch registers at any time after an initial start pulse is received will return the current count. Until an initial start pulse is received, the latch registers will have a residual value. digi.com Rabbit 6000 User’s Manual...
Page 328: Register Descriptions
Disable Input Capture 2 interrupt on roll-over to all zeros. Enable Input Capture 2 interrupt on roll-over to all zeros. Disable Input Capture 1 interrupt on roll-over to all zeros. Enable Input Capture 1 interrupt on roll-over to all zeros. digi.com Rabbit 6000 User’s Manual...
Page 329 These bits are reserved and should be written with zero. Input Capture interrupts are disabled. Input Capture interrupt use Interrupt Priority 1. Input Capture interrupt use Interrupt Priority 2. Input Capture interrupt use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 330 Ignore the ending input. These two bits are ignored in Counter operation. The Stop condition is the rising edge of the ending input. The Stop condition is the falling edge of the ending input. The Stop condition is either edge of the ending input. digi.com Rabbit 6000 User’s Manual...
Page 331 MSB of the count. In Counter operation, if no latching condition is specified the value written to this register is returned. Write The eight LSBs of the match value for counter mode are stored. digi.com Rabbit 6000 User’s Manual...
Page 332 The most significant eight bits of the latched Input capture count are Read returned. In Counter operation, if no latching condition is specified the value written to this register is returned. Write The eight MSBs of the match value for counter mode are stored. digi.com Rabbit 6000 User’s Manual...
Page 333: Quadrature Decoder
ECODER 29.1 Overview The Rabbit 6000 has a two-channel Quadrature Decoder that accepts inputs via specific pins on Parallel Ports D and E. Each channel has two inputs, the in-phase (I) input and the 90 degree or quadrature-phase (Q) input. An 8 or 10-bit up/down counter counts encoder steps in the forward and backward directions, and provides interrupts when the count goes from 0x00 to 0xFF (or 0x3FF) or from 0xFF (or 0x3FF) to 0x00.
Page 334 0x00, or when the counter decrements from 0x00 to 0xFF (0x3FF in 10-bit mode). The timing for the interrupt is shown below. Note that the status bits in the QDCSR are set coincident with the inter- rupt, and the interrupt and status bits are cleared by reading the QDCSR. digi.com Rabbit 6000 User’s Manual...
Page 335: Block Diagram
00000000 Quad Decode Count 1 Register QDC1R 0x0094 xxxxxxxx Quad Decode Count 1 High Register QDC1HR 0x0095 xxxxxxxx Quad Decode Count 2 Register QDC2R 0x0096 xxxxxxxx Quad Decode Count 2 High Register QDC2HR 0x0097 xxxxxxxx digi.com Rabbit 6000 User’s Manual...
Page 336: Dependencies
The Quadrature Decoder interrupt vector is in the IIR at offset 0x190. It can be set as Priority 1, 2, or 3. The status bits in the QDCSR are set coincident with the interrupt request and are reset when QDCSR is read. digi.com Rabbit 6000 User’s Manual...
Page 337: Operation
; save used registers ioi ld a, (QDCSR) ; clear the interrupt request and get status ; perform any necessary software counter adjustments here ; read current counter value(s) pop af ; restore used registers ipres digi.com Rabbit 6000 User’s Manual...
Page 338: Register Descriptions
This bit is cleared by a read of this register. This bit always reads as zero. No effect on the Quadrature Decoder 1. (Write- Reset Quadrature Decoder 1 to all zeros, without causing an interrupt. only) digi.com Rabbit 6000 User’s Manual...
Page 339 (Address = 0x0095) (QDC2HR) (Address = 0x0097) Bit(s) Value Description Read These bits are reserved and will always read as zeros. The current value of bits 9-8 of the Quadrature Decoder counter is Read reported. digi.com Rabbit 6000 User’s Manual...
Page 340: Pulse Width Modulator
These options provide support for driving servos and to generate audio signals. The setup for this interrupt is done in the PWL0R and PWL1R registers. The timing is shown below. digi.com Rabbit 6000 User’s Manual...
Page 341 Pulse-Width LSBs n/4 + 1 n/4 + 1 n/4 + 1 n/4 + 1 n/4 + 1 n/4 + 1 n/4 + 1 n/4 + 1 n/4 + 1 n/4 + 1 digi.com Rabbit 6000 User’s Manual...
Page 342 Operation in the spread mode reduces the filtering requirements on the PWM output in most cases. The DMA channels on the Rabbit 6000 are designed to work with fixed I/O addresses. To allow DMA control of the PWM, a separate PWM Block Access Register (PWBAR) and PWM Block Pointer Register (PWBPR) are available.
Page 343: Block Diagram
PWM MSB 2 Register PWM2R 0x008D xxxxxxxx PWM LSB 3 Register PWL3R 0x008E xxxxx00x PWM MSB 3 Register PWM3R 0x008F xxxxxxxx PWM Block Access Register PWBAR 0x00E8 xxxxxxxx PWM Block Pointer Register PWBPR 0x00E9 10001000 digi.com Rabbit 6000 User’s Manual...
Page 344: Dependencies
This option is selected in PWL1R. The interrupt request is cleared by a write to any PWM register. The PWM interrupt vector is in the IIR at offset 0x170. It can be set as Priority 1, 2, or 3 by writing to PWL0R. digi.com Rabbit 6000 User’s Manual...
Page 345: Operation
; load next PWM value into HL here ioi ld (PWL0R), hl ; update the PWM value in PWL0R and PWM0R ; note that interrupt request is also ; cleared by register write above pop af ; restore used registers ipres digi.com Rabbit 6000 User’s Manual...
Page 346: Register Descriptions
Suppress PWM interrupts seven out of eight iterations of PWM counter. Suppress PWM interrupts three out of four iterations of PWM counter. Suppress PWM interrupts one out of two iterations of PWM counter. PWM output High for single block. Spread PWM output throughout the cycle. digi.com Rabbit 6000 User’s Manual...
Page 347 PWM register address in the sequence. PWM Block Pointer Register (PWBPR) (Address = 0x00E9) Bit(s) Value Description These bits are reserved. Three least significant bits of the PWM register address for indirect access. digi.com Rabbit 6000 User’s Manual...
Page 348: External I/O Control 31.1 Overview
31.1 Overview The Rabbit 6000’s external I/O space consists of 64KB that is accessed by prefixing a read or write instruc- tion with the IOE instruction. These accesses can go onto the memory bus or onto the external I/O bus (described below).
Page 349: I/O Strobes
31.1.2 I/O Strobes There are eight I/O strobes available in the Rabbit 6000. Each has a separate 8KB address range that can be enabled as a chip select, read strobe, write strobe, or a read/write strobe. The number of wait states can be set to 1, 3, 7, or 15, and the signal can be active high or low.
Page 350: I/O Handshake
I/O banks. The external device holds this signal (active high or low) when it is busy and cannot accept a transaction. The Rabbit 6000 will then hold midway through the transaction until either the handshake signal goes inactive or a timeout occurs. The timeout can be defined anywhere from 32 to 2048 clocks.
Page 351: Block Diagram
31.1.4 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 352: Registers
I/O Bank 7 Extended Register IB7ER 0x045F 00000000 I/O Handshake Control Register IHCR 0x0028 00000000 I/O Handshake Select Register IHSR 0x0029 00000000 I/O Handshake Timeout Register IHTR 0x002A 00000000 0x0080 or I/O Bank 0 Control Register IB0CR 00000000 0x0450 digi.com Rabbit 6000 User’s Manual...
Page 353: Dependencies
Select Parallel Port pins as I/O strobe outputs. PEFR, PEALR, PEAHR Select PD1, PD3, PD5, or PD7 as address bits PFFR, PFALR, PFAHR 6–7. PGFR, PGALR, PGAHR PHFR, PHALR, PHAHR 31.2.4 Interrupts There are no interrupts associated with external I/O. digi.com Rabbit 6000 User’s Manual...
Page 354: Operation
3. Select the handshake timeout value by writing to IHTR. Once enabled, the handshake will be checked for every external I/O transaction in a bank that was enabled in IHSR. After these transactions, the program should check for a timeout by reading IHTR. digi.com Rabbit 6000 User’s Manual...
Page 355: Register Descriptions
Enable I/O handshake for I/O Bank 2. Disable I/O handshake for I/O Bank 1. Enable I/O handshake for I/O Bank 1. Disable I/O handshake for I/O Bank 0. Enable I/O handshake for I/O Bank 0. digi.com Rabbit 6000 User’s Manual...
Page 356 Time constant for the I/O handshake timeout counter. This time constant (times 32) selects the number of peripheral clock cycles that the I/O handshake input may delay completion of an I/O transaction before the I/O transaction will complete automatically. digi.com Rabbit 6000 User’s Manual...
Page 357 Shorten read strobe by one clock cycle and write strobe by one-half clock cycle. Transaction length remains the same. This guarantees one clock cycle hold time for both address and data for I/O transactions. Use I/O bus if enabled in SPCR. Always use memory data bus. digi.com Rabbit 6000 User’s Manual...
Page 358 I/O transactions use the CPU clock divided by 2. I/O transactions use the CPU clock divided by 4. I/O transactions use the CPU clock divided by 8. I/O transactions use the CPU clock divided by 16. digi.com Rabbit 6000 User’s Manual...
Page 359 Parallel Port B[7:0] is used for the address bus. Slave port interrupts are disabled. Slave port interrupts use Interrupt Priority 1. Slave port interrupts use Interrupt Priority 2. Slave port interrupts use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 360: Breakpoints
REAKPOINTS 32.1 Overview The Rabbit 6000 contains seven hardware breakpoints to support debugging. Each hardware breakpoint consists of a 24-bit address match register and a 24-bit mask register. A breakpoint can be generated on an address match for execution, data read, data write, or any combination thereof. The mask register serves to mask off selected bits from the address compare.
Page 361: Block Diagram
32.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 362: Registers
BxA1R 0x03xD 00000000 Breakpoint x Address 2 Register BxA2R 0x03xE 00000000 Breakpoint x Mask 0 Register BxM0R 0x03x8 00000000 Breakpoint x Mask 1 Register BxM1R 0x03x9 00000000 Breakpoint x Mask 2 Register BxM2R 0x03xA 00000000 digi.com Rabbit 6000 User’s Manual...
Page 363: Dependencies
The breakpoint interrupt vector is in the EIR at offset 0x140; note that this is a different vector address than in previous Rabbit processors. It is always set to Interrupt Priority 3, and is the highest priority inter- rupt; if two Interrupt Priority 3 vectors are pending, the breakpoint interrupt will always be handled first.
Page 364: Example Isr
; reenable any breakpoints by writing to BDCR pop af ipres ; you should exit the handler with these two instruc- tions ; if you reenabled breakpoints, otherwise another breakpoint ; interrupt may occur inside the ISR digi.com Rabbit 6000 User’s Manual...
Page 365: Register Descriptions
Breakpoint x on User Mode write address match. Breakpoint x on System Mode write address match. Breakpoint x on System or User Mode write address match. These bits are reserved and should be written with zeros. digi.com Rabbit 6000 User’s Manual...
Page 366 (B0A2R) (Address = 0x030E) (B1A2R) (Address = 0x031E) (B2A2R) (Address = 0x032E) (B3A2R) (Address = 0x033E) (B4A2R) (Address = 0x034E) (B5A2R) (Address = 0x036E) (B6A2R) (Address = 0x037E) Bit(s) Value Description Breakpoint x Address [23:16]. digi.com Rabbit 6000 User’s Manual...
Page 367 (Address = 0x033A) (B4M2R) (Address = 0x034A) (B5M2R) (Address = 0x036A) (B6M2R) (Address = 0x037A) Bit(s) Value Description Breakpoint x Mask [23:16]. (A one in a bit position inhibits the address compare for that bit position. digi.com Rabbit 6000 User’s Manual...
Page 368: Flexible Interface Modules
Flexible Interface Module functionality is available on Parallel Ports F and G. Other Rabbit parallel ports can be accessed to a limited extent using port override modes avail- able on the Flexible Interface Module. If the override is enabled, the entire parallel port is then controlled by the FIM.
Page 369: Block Diagram
33.2 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 370: Registers
FIMB Control Bytes 0–15 FBCBxR 0x7007 + x 00000000 FIMB Port Expansion Bytes 0–15 FBPEBxR 0x7017 + x 00000000 0x7800– FIMB Code LSB Register FBCLR xxxxxxxx 0x7BFF 0x7C00– FIMB Code MSB Register FBCMR xxxxxxxx 0x7FFF digi.com Rabbit 6000 User’s Manual...
Page 371: Dependencies
The Flexible Interface Modules have two clocking options, selectable in the Master System Configuration Register. One option is to use the main clock output, just like the Rabbit processor; the other is to use the output of the main PLL.
Page 372: Operation
33.4.1 Handling Interrupts The interrupt receive/acknowledge handshaking between the Flexible Interface Module and the Rabbit 6000 has to be handled manually for both the Flexible Interface Module interrupting the Rabbit and vice versa. Sample code for each is shown below.
Page 373 33.4.1.2 Flexible Interface Module Interrupt Request to Rabbit FIM_A_ISR: push af ; save registers push bc ioi ld a, (FAIOR) ; get interrupt value that FIMA sent ld a, 0x80 ioi ld (FAIIR), a ; set acknowledge bit for FIMA ld b, 255 ;...
Page 374: Register Descriptions
Rx FIFO not full. (Read- Rx FIFO full. only) Rx FIFO not empty. (Read- Rx FIFO empty. only) Tx FIFO not full. (Read- Tx FIFO full. only) Tx FIFO not empty. (Read- Tx FIFO empty. only) digi.com Rabbit 6000 User’s Manual...
Page 375 These bits are reserved and should always be written with zeros. Flexible Interface Module interrupt disabled. Flexible Interface Module interrupt uses priority 1. Flexible Interface Module interrupt uses priority 2. Flexible Interface Module interrupt uses priority 3. digi.com Rabbit 6000 User’s Manual...
Page 376 Flexible Interface Module processor. Bytes 0–7 are mapped to data memory addresses 0x10–0x17, and bytes 8–15 are mapped to data memory addresses 0x90–0x97. These registers are read-write for the Rabbit, but read-only for the FIM. FIMA Port Expansion x Register (FAPE0R)
Page 377 Returns the contents of the receive FIFO buffer. FIMB Rx Status FIFO Register (FBRSFR) (Address = 0x7001) Bit(s) Value Description This bit is reserved and always returns zero. read Returns the contents of the receive status FIFO buffer. digi.com Rabbit 6000 User’s Manual...
Page 378 The Flexible Interface Module processor will wait for the main processor to set bit 7 of the Inbound Interrupt Register before clearing the interrupt code. The code values are user-defined. digi.com Rabbit 6000 User’s Manual...
Page 379 These bits are reserved and should always be written with zeros. Flexible Interface Module interrupt disabled. Flexible Interface Module interrupt uses priority 1. Flexible Interface Module interrupt uses priority 2. Flexible Interface Module interrupt uses priority 3. digi.com Rabbit 6000 User’s Manual...
Page 380 User-defined status bytes that are mapped to the data memory of the Flexible Interface Module processor. Bytes 0–7 are mapped to data (Read- memory addresses 0x18–0x1F, and bytes 8–15 are mapped to data only) memory addresses 0x98–0x9F. digi.com Rabbit 6000 User’s Manual...
Page 381 This bit is reserved and should be written with zero. no reset of Flexible Interface Module A. Reads always return zero. (wr-only) Reset Flexible interface Module A. This bit holds FIMA in Reset while set. digi.com Rabbit 6000 User’s Manual...
Page 382 Override Port C operation (FIM A or FIM B controls the port). Normal operation for Port B. Override Port B operation (FIM A or FIM B controls the port). Normal operation for Port A. Override Port A operation (FIM A or FIM B controls the port). digi.com Rabbit 6000 User’s Manual...
Page 383: Overview
ORRECTION 34.1 Overview The Rabbit 6000 contains a hardware-assist Error Check and Correction (ECC) peripheral to aid in gener- ating and checking various check codes. It consists of a 32-bit counter and the required circuitry for the operations listed in Table 34-1.
Page 384: Block Diagram
ECC Write 1 Register ECW1R 0x05C8 00000000 ECC Write 2 Register ECW2R 0x05C9 00000000 ECC Write 3 Register ECW3R 0x05CA 00000000 ECC Count 0 Register ECC0R 0x05CB 00000000 ECC Count 1 Register ECC1R 0x05CC 00000000 digi.com Rabbit 6000 User’s Manual...
Page 385: Dependencies
2. If desired, the initial state of the CRC counter can be set by writing to ECWxR. 3. Start writing data to ECDxR. 4. When all data have been written for that block, read the CRC counter from ECDxR for normal bit order, or ECWxR for reverse bit order. digi.com Rabbit 6000 User’s Manual...
Page 386: Register Descriptions
(Address = 0x05C2) Bit(s) Value Description Read LP/CRC bits 23–16. Write Data byte for ECC/CRC calculation. ECC Data 3 Register (ECD3R) (Address = 0x05C3) Bit(s) Value Description Read LP/CRC bits 31–24. Write Data byte for ECC/CRC calculation. digi.com Rabbit 6000 User’s Manual...
Page 387 These bits are reserved and should be written with zeros. Read {00, CP value}. Write {00, CP set value} ECC CP Read Shifted Register (ECPSR) (Address = 0x05C6) Bit(s) Value Description Read {CP value, 00}. Write {00, CP set value}. digi.com Rabbit 6000 User’s Manual...
Page 388 Set bits 7–0 o f the ECC counter. ECC Count 1 Register (ECC1R) (Address = 0x05CC) Bit(s) Value Description Read Returns bits 15–8 of the ECC counter. Write Set bits 15–8 o f the ECC counter. digi.com Rabbit 6000 User’s Manual...
Page 389: I2C Peripheral (Serial Port G)
35. I ERIPHERAL ERIAL 35.1 Overview Serial Port G in the Rabbit 6000 is a fully featured I C peripheral. It supports the following features of the Phillips I C standard: • Master or slave mode • Standard (100 kbit/s) and fast (400 kbit/s) clock modes •...
Page 390: Block Diagram
35.1.1 Block Diagram digi.com Rabbit 6000 User’s Manual...
Page 391: Registers
Serial Port G Timing Control Registers SGTC2R 0x0596 00000000 SGTC3R 0x0597 00000000 SGSBM0R 0x0598 00000011 SGSBM1R 0x0599 00000000 Serial Port G Bus Monitor Registers SGSBM2R 0x059A 00000000 SGSBM3R 0x059B 00000000 Serial Port G Main Control Register SGMCR 0x059F 00000000 digi.com Rabbit 6000 User’s Manual...
Page 392: Dependencies
(master mode) The interrupt selection is in SGC1R. The I C interrupt vector is located in the IIR at offset 0x150. It can be set as Priority 1, 2, or 3 in SGMCR. digi.com Rabbit 6000 User’s Manual...
Page 393: Operation
7. Monitor bit 4 of SGSxR to determine when the byte has been sent. 8. Repeat Steps 6–8 until all data have been sent. To start communicating with a new slave, restart at Step 2. digi.com Rabbit 6000 User’s Manual...
Page 394: Master Mode, Data Read
7. If bits 1 or 7 of SGSxR are set, then an ACK or STOP condition occurred and the slave can go back to Step 1. If not, it should go back to Step 4 to receive the next byte. digi.com Rabbit 6000 User’s Manual...
Page 395: Register Descriptions
Master mode operation (I C controller clock is an output). Disable the I C controller. Enable the I C controller. No effect. Reset the I C controller. This bit is automatically cleared after two clock cycles. digi.com Rabbit 6000 User’s Manual...
Page 396 No effect. Force SDA low. This is not used in normal operation. Serial Port G Control 3 Register (SGC3R) (Address = 0x0583) Bit(s) Value Description These bits are reserved and should always be written as zeros. digi.com Rabbit 6000 User’s Manual...
Page 397 Controller has not received or sent a non-ACK. (Read- Controller has received or sent a non-ACK. only) Controller is not in master-receive or slave-transmit mode. (Read- Controller is in master-receive or slave-transmit mode. only) digi.com Rabbit 6000 User’s Manual...
Page 398 These bits are reserved and will always return zeros. Serial Port G Clock Division 0 Register (SGCD0R) (Address = 0x0588) Bit(s) Value Description Bits 7–0 of the divider that generates the I C clock on SCL). digi.com Rabbit 6000 User’s Manual...
Page 399 Bit(s) Value Description These bits are reserved and should always be written with zeros. Bits 9–8 of the slave address when operating in the slave mode. These bits are ignored in the 7-bit addressing mode. digi.com Rabbit 6000 User’s Manual...
Page 400 Description These bits are reserved and should be written as zeros. Serial Port G Timing Control 3 Register (SGTC3R) (Address = 0x0597) Bit(s) Value Description These bits are reserved and should be written as zeros. digi.com Rabbit 6000 User’s Manual...
Page 401 Description These bits are reserved and should be written as zeros. Serial Port G Bus Monitor 3 Register (SGBM3R) (Address = 0x059B) Bit(s) Value Description These bits are reserved and should be written as zeros. digi.com Rabbit 6000 User’s Manual...
Page 402 Parallel Port PE0 is used for SDA. Parallel Port PE4 is used for SDA. The serial port interrupt is disabled. The serial port uses interrupt priority 1. The serial port uses interrupt priority 2. The serial port uses interrupt priority 3. digi.com Rabbit 6000 User’s Manual...
Page 403: Overview
The Rabbit 6000 contains several power-saving features. Since the power consumed by the pro- cessor is proportional to the clock speed, the Rabbit 6000 provides 12 clock modes that can go as low as 2 kHz. To further reduce power consumption in those ultra-sleepy modes, various short- ened chip select strobes are available to reduce current draw by the attached memory devices.
Page 404: Registers
36.1.1 Registers Register Name Mnemonic I/O Address Reset GCSR 0x0000 11000000 Global Control/Status Register GPSCR 0x000D 00000000 Global Power Save Control Register GCDR 0x000F 00000000 Global Clock Double Register digi.com Rabbit 6000 User’s Manual...
Page 405: Operation
36.2.3 Clock Rates The processor and peripheral clocks in the Rabbit 6000 can be run in six different modes using the main oscillator or the main PLL: full speed; divided by 2, 4, 6, or 8; and the processor clock divided by 8 with the peripheral clock at full speed.
Page 406 1MB RAM is 12MHz. It is recommended that in that situation the Rabbit 6000 be performing a tight polling loop in another memory device, either SRAM or external parallel flash, waiting for a wake-up event.
Page 407: Short Chip Selects
The read data in the fig- ures below is sampled by the rising edge of CLKI that terminated the T2 cycle. Wait states are inserted between T1 and T2 so they do not affect the width of the strobe. digi.com Rabbit 6000 User’s Manual...
Page 408 Rabbit 6000 User’s Manual...
Page 409 32 kHz clock (30.5 µs); otherwise the timing is identical to the short chip select options based off the main oscillator. Read strobe figures are shown below. digi.com Rabbit 6000 User’s Manual...
Page 410 Rabbit 6000 User’s Manual...
Page 411 Rabbit 6000 User’s Manual...
Page 412: Self-Timed Chip Selects
(selectable) period of time ranging from 165 to 345 nS; this can be enabled for both reads and writes, or reads only. A sample read and write timing diagram is shown below. digi.com Rabbit 6000 User’s Manual...
Page 413: Register Descriptions
Processor clock from the fast clock, divided by 6. Peripheral clock from the fast clock, divided by 6. Periodic interrupts are disabled. Periodic interrupts use Interrupt Priority 1. Periodic interrupts use Interrupt Priority 2. Periodic interrupts use Interrupt Priority 3. digi.com Rabbit 6000 User’s Manual...
Page 414 This bit combination is reserved and should not be used. This bit combination is reserved and should not be used. 32KHz clock divided by two (16.384KHz). 32KHz clock divided by four (8.192KHz). 32KHz clock divided by eight (4.096KHz). 32KHz clock divided by sixteen (2.048KHz). digi.com Rabbit 6000 User’s Manual...
Page 415 25.5 ns nominal Low time. 01101 27 ns nominal Low time. 01110 28.5 ns nominal Low time. 01111 30 ns nominal Low time. 10001 4.5 nS nominal Low time. 10010 6 nS nominal Low time. digi.com Rabbit 6000 User’s Manual...
Page 416: Specifications
4-14 mA /CS1 8 mA Other memory strobes (selectable) 4-14 mA DRIVE /IOWR, /IORD, /IOBEN (selectable) 4-14 mA All parallel port pins (selectable) 4-14 mA CLK, ACK_LED, LED[3:0] 16 mA All other pins 8 mA digi.com Rabbit 6000 User’s Manual...
Page 417 (rest of device powered) VBATIO 3.0 V 3.3 V 3.6 V (rest of device powered down) 1.08 V 1.2 V 3.6 V VBATIO Current (rest of device powered) to be VBATIO (rest of device powered down) determined digi.com Rabbit 6000 User’s Manual...
Page 418: Ac Characteristics
25 MHz 42 MHz Real-Time Clock Frequency on CLK32K 32.768 kHz 25 MHz ± 100 ppm Ethernet Clock Frequency 20 MHz ± 100 ppm Wi-Fi Clock Frequency Wi-Fi 48 MHz ± 100 ppm USB Clock Frequency digi.com Rabbit 6000 User’s Manual...
Page 419: External Memory Access Times
Clock to Memory Write Strobe Delay 3 ns 6 ns High Z to Data Valid Relative to Clock T 3 ns 8 ns DVHZ Data Valid to High Z Relative to Clock T 3 ns 8 ns DVHZ digi.com Rabbit 6000 User’s Manual...
Page 420 Figure 37.1 Memory Read and Write Cycles digi.com Rabbit 6000 User’s Manual...
Page 421 Figure 37.2 Memory Read and Write Cycles—Early Output Enable and Write Enable Timing digi.com Rabbit 6000 User’s Manual...
Page 422: External I/O Reads
Clock to I/O Buffer Enable Delay 3 ns 6 ns BUFEN High Z to Data Valid Relative to Clock T 3 ns 6 ns DHZV Data Valid to High Z Relative to Clock T 1 ns 2 ns DVHZ digi.com Rabbit 6000 User’s Manual...
Page 423 Figure 37.3 I/O Read Cycles—No Extra Wait States NOTE: /IOCSx can be programmed to be active low (default) or active high. digi.com Rabbit 6000 User’s Manual...
Page 424 Figure 37.4 I/O Write Cycles—No Extra Wait States NOTE: /IOCSx can be programmed to be active low (default) or active high. digi.com Rabbit 6000 User’s Manual...
Page 425: Clock Speeds
15 ns devices (doubler) 55 ns, 3 wait states 70 ns, 4 wait states 45 ns, 0 wait states 36.8640 18.4320 55 ns, 1 wait state 45 ns devices (doubler) 70 ns, 1 wait state digi.com Rabbit 6000 User’s Manual...
Page 426 Table 37-8. Some Recommended Clock/Memory Configurations Input Frequency Internal Frequency Recommended Memory Timing Optimal Use (MHz) (MHz) 55 ns, 0 wait states 29.4912 14.7456 55 ns devices (doubler) 70 ns, 1 wait state digi.com Rabbit 6000 User’s Manual...
Page 427: Power And Current Consumption
Table 37-5. Exercise care that they are only enabled when being used. 37.5.1 Sleepy Mode Current Consumption The Rabbit 6000 supports designs with very low power consumption by using features such as the ultra- sleepy modes and self-timed chip selects. At the low frequencies possible in the ultra-sleepy modes (as low as 2 kHz), the external memory devices become significant factors in the current consumption unless one of the short or self-timed chip selects is used.
Page 428: Battery-Backed Clock Current Consumption
37.5.2 Battery-Backed Clock Current Consumption For the battery-backed features of the Rabbit 6000 to operate while the processor is powered down, both the VBAT and VBATIO pins need to be supplied properly. The VBAT pin powers the internal real-time clock and the battery-backed SRAM, while VBATIO powers the /RESET, /CS1, CLK32K, and RESOUT pins.
Page 429: Package Specifications And Pinout
38. P ACKAGE PECIFICATIONS AND INOUT 38.1 Ball Grid Array Packages 38.1.1 Pinout 17mm × 17mm BGA 292 Figure 38.1 BGA 292 Pinout Looking Through the Top of Package digi.com Rabbit 6000 User’s Manual...
Page 430: Pinout 15Mm × 15Mm Bga 233
38.1.2 Pinout 15mm × 15mm BGA 233 Figure 38.2 BGA 233 Pinout Looking Through the Top of Package digi.com Rabbit 6000 User’s Manual...
Page 431: Mechanical Dimensions And Land Pattern
38.1.3 Mechanical Dimensions and Land Pattern Figure 38-3(a). BGA 292 Package Outline digi.com Rabbit 6000 User’s Manual...
Page 432 The design considerations in Table 38-2 are based on 5 mil design rules and assume a single conductor between solder lands. Table 38-2. Design Considerations (all dimensions in mm) Feature Recommendation Solder Land Diameter 0.356 (0.014) digi.com Rabbit 6000 User’s Manual...
Page 433 NSMD Defined Land Diameter 0.406 (0.016) Land to Mask Clearance (min.) 0.076 (0.003) Conductor Width (max.) 0.127 (0.005) Conductor Spacing (typ.) 0.127 (0.005) Via Capture Pad (max.) 0.406 (0.016) Via Drill Size (max.) 0.203 (0.008) digi.com Rabbit 6000 User’s Manual...
Page 434: Rabbit Pin Descriptions
38.2 Rabbit Pin Descriptions Table 38-3 lists all the pins on the Rabbit 6000 along with the data direction of the pin, its function, and the pin number on the die. Table 38-3. Rabbit 6000 Pin Descriptions Pin Group Pin Name...
Page 435 Table 38-3. Rabbit 6000 Pin Descriptions Pin Group Pin Name Direction Function BGA 292 Ball BGA 233 Ball Output Address Bus CPU Buses Output Address Bus 0 Bar Bidirectional Data Bus VBAT Input 1.2V Real-Time Clock VBATIO Input 2.0V - 3.3V R4, T4 digi.com...
Page 436 Table 38-3. Rabbit 6000 Pin Descriptions Pin Group Pin Name Direction Function BGA 292 Ball BGA 233 Ball /WDT Output WDT Time-Out STATUS Output IFetch First Byte Status & SYSCFG Input System Config. Control SMODE1, Bootstrap Mode & Inputs SMODE0...
Page 437 Table 38-3. Rabbit 6000 Pin Descriptions Pin Group Pin Name Direction Function BGA 292 Ball BGA 233 Ball Input / Output Parallel Port A Input / Output Parallel Port B Input / Output Parallel Port C I/O Ports Input / Output...
Page 438 Table 38-3. Rabbit 6000 Pin Descriptions Pin Group Pin Name Direction Function BGA 292 Ball BGA 233 Ball Input / Output Parallel Port G I/O Ports (cont’d) Input / Output Parallel Port H Output Transmit Input Receive /SPEED_LED Ethernet /TX_LED...
Page 439 Table 38-3. Rabbit 6000 Pin Descriptions Pin Group Pin Name Direction Function BGA 292 Ball BGA 233 Ball /WIFI_ACT_LED Output Link Activity ANT1 Outputs Antenna Select ANT2 LNA1 Outputs LNA Control LNA0 PA2G_ON Output 2GHz PA Enable PA5G_ON Output 5GHz PA Enable...
Page 440 Table 38-3. Rabbit 6000 Pin Descriptions Pin Group Pin Name Direction Function BGA 292 Ball BGA 233 Ball VRXI+ Input Inphase + Input VRXI- Input Inphase - Input VRXQ+ Input Quadrature + Input VRXQ- Input Quadrature - Input Input A/D Ext Bandgap...
Page 441: Alternate Parallel Port Pin Outputs
Table A-1. Alternate Parallel Port A and B Pin Outputs Alternate Output Options External I/O Serial Clock Slave Port PA[7:0] — ID[7:0] SD[7:0] — /SLVATTN — /SCS — — — /SRD — /SWR SCLKA — SCLKB — digi.com Rabbit 6000 User’s Manual...
Page 442 — SCLKG PWM1 RCLKE — SDATG PWM0 TCLKE — — TIMER C3 SCLKD — USB_PWR TIMER C2 — SCLKG TIMER C1 RCLKF — SDATG TIMER C0 TCLKF — FIMA7 PWM3 SCLKC — FIMA6 PWM2 — digi.com Rabbit 6000 User’s Manual...
Page 443 TIMER C1 RCLKF — FIMB0 TIMER C0 TCLKF — — PWM3 SCLKC — PWM2 — PWM1 RCLKE — PWM0 TCLKE — TIMER C3 SCLKD — TIMER C2 — TIMER C1 RCLKF — TIMER C0 TCLKF digi.com Rabbit 6000 User’s Manual...
Page 444: Alternate Parallel Port Pin Inputs
DREQ1 — — QD2A — — — DREQ0 — — QD2B — SCLKC — — — INT1 — QD1A — RCLKF — — — INT0 — QD1B — SCLKD TCLKF DREQ1 — — QD2A /SCS digi.com Rabbit 6000 User’s Manual...
Page 445 — — — — — — INT2–7 FIMB3 — — — — — — INT2–7 FIMB2 — — — — — — INT2–7 FIMB1 — — — — — — INT2–7 FIMB0 — — — digi.com Rabbit 6000 User’s Manual...
Page 446 Analog Component 1 LSB Registers ...236 PWM ..............343 Analog Component 1 MSB Registers ..237 Quadrature Decoder .......... 335 multiplexed A/D converter Rabbit 6000 ............11 ADC Command/Status Register ....246 reset ..............36 ADC Control Register ........247 Serial Ports A – D ..........186 ADC LSB Register ........245...
Page 447 ..........264 overview ............368 registers .............253 register descriptions ...........374 setup ..............256 registers .............370 timed requests ............250 transfer priorities ..........258 transfer priority ..........258 hardware debugging. transfer rates ............259 breakpoints transfers .............251 use with peripherals ...........263 digi.com Rabbit 6000 User’s Manual...
Page 448 .......66 memory management ..........60 Network Port B .........291, 293 memory protection ..........67 Network Port C ..........316 MMU ..............61 read and write transactions ......64 operation ..............84 stack protection ..........67 Parallel Port D ...........117 digi.com Rabbit 6000 User’s Manual...
Page 449 ........100 overview ............136 block diagram ............101 PFDR setup ............136 clocks ..............102 register descriptions ...........141 dependencies .............102 registers .............139 external I/O bus ..........100 Parallel Port G ............145 operation ............103 alternate input functions ........146 overview ............100 digi.com Rabbit 6000 User’s Manual...
Page 450 ISR ..........345 A2CR ............239 operation ............345 A2LR ............238 outputs ............340, 342 A2MR ............238 overview ............340 ACSxCR ............76 register descriptions ..........346 ADCCR ............247 registers .............343 ADCCSR ............246 spreading function ..........341 ADCLR ............245 ADCMR ............245 ADCxLR ............248 digi.com Rabbit 6000 User’s Manual...
Page 451 ICMxR ............332 DySCR ............277 ICSxR ............331 DyTBR ............272 ICTxR ............330 DyTMR ............273 IHCR .............355 ECC0R ............388 IHSR .............355 ECC1R ............388 IHTR .............356 ECCR ............387 IOPCR ............359 ECD0R ............386 IxCR ............92, 93 ECD1R ............386 MACR ............75 digi.com Rabbit 6000 User’s Manual...
Page 452 PGFR ............151 PCAHR ............111 PGxCR ..........152, 160 PCALR ............110 PHAHR ............159 PCDCR ............111 PHALR ............158 PCDDR ............110 PHDCR ............159 PCDR ............110 PHDDR ............160 PCFR ............111 PHDR ............158 PCxCR ............112 PHFR ............159 PDAHR ............120 PWBAR ............347 digi.com Rabbit 6000 User’s Manual...
Page 453 Global Clock Double Register ......30 SxCR ............196, 213 Global Clock Modulator 0 Register ....29 SxDHR ..........199, 215 Global Clock Modulator 1 Register ....29 SxDLR ..........198, 215 Global Control/Status Register ....28, 48 SxDR ............193, 210 Global Output Control Register ......31 digi.com Rabbit 6000 User’s Manual...
Page 454 Serial Port G Timing Control 1 Register ..400 I/O Bank x Extended Register ......358 Serial Port G Timing Control 2 Register ..400 I/O Handshake Control Register ....355 Serial Port G Timing Control 3 Register ..400 digi.com Rabbit 6000 User’s Manual...
Page 455 Parallel Port D Data Direction Register ..121 Network Port B MII Read MSB Register ..305 Parallel Port D Data Register .......119 Network Port B MII Register Address Register . Parallel Port D Drive Control Register ..121 digi.com Rabbit 6000 User’s Manual...
Page 456 PWM MSB x Register ........347 Real-Time Clock x Register ......49 Quadrature Decoder ..........335 Secondary Watchdog Timer Register .....51 Quad Decode Control Register .....339 Watchdog Timer Control Register ....50 Quad Decode Control/Status Register ..338 Watchdog Timer Test Register .......50 digi.com Rabbit 6000 User’s Manual...
Page 457 ........228, 240 clocked serial mode ......184, 191 BGA package ............429 overview ............184 dimensions ............431 pin use ............188 land pattern ...........431 register descriptions ........193 pinout ............429, 430 registers ............187 clock speeds ............425 SPI clock modes ...........184 digi.com Rabbit 6000 User’s Manual...
Page 458 ........47 interrupts ........162, 165, 166 settings ..............47 example ISR ...........166 operation ............166 overview ............161 register descriptions ........167 registers ............164 reload register operation .......161 Timer B .............169 block diagram ..........170 clocks ............171 dependencies ..........171 interrupts ............172 digi.com Rabbit 6000 User’s Manual...

Rabbit 6000 User Manual

1 The Rabbit 6000 Processor

2 Clocks

3 Reset and Bootstrap

4 System Management

5 Memory Management

6 Interrupts

7 External Interrupts

8 Parallel Port a

9 Parallel Port B

10 Parallel Port C

11 Parallel Port D

12 Parallel Port E

13 Parallel Port F

14 Parallel Port G

15 Parallel Port H

16 Timer a

17 Timer B

18 Timerc

19 Serial Portsa - D

20 Serial Portse - F

21 Slave Port

22 Wi-Fi Analog Components

23 Analog/Digital Converter

24 DMA Channels

100 Base-T Ethernet

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Summary of Contents for Rabbit 6000