Configuration Clocks; Osc_Clk_1 Clock Input - Intel Stratix 10 Configuration User Manual

2.6. Configuration Clocks

2.6.1. OSC_CLK_1 Clock Input

When you drive
OSC_CLK_1
configuration bitstream at 250 MHz. Intel Stratix 10 devices include an internal
oscillator in addition to
between 170-230 MHz. Intel Stratix 10 devices always use this internal oscillator to
load the first section of the bitstream (approximately 200 kilobyte (KB). The SDM can
use either clock source for the remainder of device configuration. If you use the
internal oscillator, can you leave the
Note: Device configuration may fail under the following conditions when you select the
OSC_CLK_1
•
You fail to drive the
•
You drive the
input reference clock frequencies to drive the
— 25
— 100
— 125
The Intel Stratix 10 device multiplies the
generate a 250 MHz clock for configuration. Using an
fastest possible configuration. Refer to Setting Configuration Clock Source for
instructions on completing this task.
Related Information
• Intel Stratix 10 L- and H-Tile Transceiver PHY User Guide
• Intel Stratix 10 E-Tile Transceiver PHY User Guide
• Intel Stratix 10 External Memory Interfaces IP User Guide
• Setting Configuration Clock Source
Intel Stratix 10 Configuration User Guide
24
input clock with an external clock source and enable
OSC_CLK_1
in the Intel Quartus Prime software, the device loads the majority of the
OSC_CLK_1
as the clock source for configuration:
OSC_CLK_1
pin at an incorrect frequency. Select one of the following
OSC_CLK_1
2. Intel Stratix 10 Configuration Details
which run the configuration process at a frequency
unconnected.
OSC_CLK_1
pin.
OSC_CLK_1
source clock frequency to
OSC_CLK_1
OSC_CLK_1
on page 23
UG-S10CONFIG | 2018.11.02
pin:
source enables the
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