Intel Stratix 10 Configuration User Manual page 50

Pin
flash_data[]
flash_nce[]
flash_nwe
flash_noe
flash_clk
flash_nadv
flash_nreset
(12)
Intel recommends not inserting logic between the PFL II pins and the host I/O pins, especially
on the flash_data and fpga_nconfig pins.
Intel Stratix 10 Configuration User Guide
50
Type Weak Pull-
Up
Input or —
Output
(bidirectional
pin)
Output —
Output —
Output —
Output —
Output —
Output —
3. Intel Stratix 10 Configuration Schemes
UG-S10CONFIG | 2018.11.02
Function
bus. The output of this pin depends on
flash_data
the setting of the unused pins if you did not select
the PFL II interface tri-state option when the PFL II
is not accessing the flash memory device.
Data bus to transmit or receive 8- or 16-bit data to
or from the flash memory in parallel. The output of
this pin depends on the setting of the unused pins if
you did not select the PFL II interface tri-state
option when the PFL II is not accessing the flash
(12)
memory device.
Connects to the pin of the flash memory
nCE
device. A low signal enables the flash memory
device. Use this pin for multiple flash memory
device support. The
flash_nce
each pin of all the connected flash memory
nCE
devices. The width of this port depends on the
number of flash memory devices in the chain.
Connects to the pin of the flash memory
nWE
device. A low signal enables write operation to the
flash memory device.
Connects to the pin of the flash memory
nOE
device. A low signal enables the outputs of the flash
memory device during a read operation.
Used for burst mode. Connects to the
of the flash memory device. The active edges of
increment the flash memory device internal address
counter. The frequency is half of the
flash_clk
frequency in burst mode for single CFI
pfl_clk
flash. In dual P30 or P33 CFI flash solution, the
frequency runs at a quarter of the
flash_clk
frequency. Use this pin for burst mode
pfl_clk
only. Do not connect these pins from the flash
memory device to the host if you are not using
burst mode.
Used for burst mode. Connects to the address valid
input pin of the flash memory device. Use this signal
for latching the start address. Use this pin for burst
mode only. Do not connect these pins from the flash
memory device to the host if you are not using
burst mode.
Connects to the reset pin of the flash memory
device. A low signal resets the flash memory device.
pin is connected to
input pin
CLK
CLK
continued...
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