Setting Guidelines; Configuration - ABB RES670 Applications Manual

Relion 670 series phasor measurement unit
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Section 15
Logic
15.6.2
15.6.2.1
236

Setting guidelines

There are no settings for AND gates, OR gates, inverters or XOR gates as well as,
for ANDQT gates, ORQT gates or XORQT gates.
For normal On/Off delay and pulse timers the time delays and pulse lengths are set
from the local HMI or via the PST tool.
Both timers in the same logic block (the one delayed on pick-up and the one
delayed on drop-out) always have a common setting value.
For controllable gates, settable timers and SR flip-flops with memory, the setting
parameters are accessible via the local HMI or via the PST tool.

Configuration

Logic is configured using the ACT configuration tool in PCM600.
Execution of functions as defined by the configurable logic blocks runs according
to a fixed sequence with different cycle times.
For each cycle time, the function block is given an serial execution number. This is
shown when using the ACT configuration tool with the designation of the function
block and the cycle time, see example below.
IEC09000695 V2 EN-US
Figure 82:
Example designation, serial execution number and cycle time for
logic function
GUID-E6BD982D-9E47-4CC2-9666-6E5CABA414C0 v4
GUID-D93E383C-1655-46A3-A540-657141F77CF0 v4
IEC09000695_2_en.vsd
Phasor measurement unit RES670 2.2 IEC
1MRK 511 407-UEN C
Application manual

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