Spi (22); Character X 2-Line Lcd (23); Rotary Encoder (24) - Xilinx SP305 Spartan-3 User Manual

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SPI (22)

The SP-305 board has a J22 connected to VCC, GND and 4 general purpose FPGA I/O. The
intention is to use these as SPI bus signals, but they can be used for any I/O interface.
Table 2-12: SPI Pin Connections

Character x 2-Line LCD (23)

The SP-305 board has a 16-character x 2-line LCD (Lumex LCM-S01602DTR/M) on the
board to display text information. Potentiometer R1 adjusts the contrast of the LCD. The
data interface to the LCD is connected to the FPGA to support 4-bit mode only. A level
translator chip is used to shift the voltage level between the FPGA and the LCD.
Table 2-13: LCD FPFA Pin Connections

ROTARY ENCODER (24)

The SP-305 board has a Rotary Encoder switch. The switch has encoder channel A and B as
well as the interface to a momentary contact push button switch as part of the encoder
shaft. Typically the FPGA I/O for this device must to be configured with a pull up on
rot_enc A, B, as they are grounded at the encoder. The switch also has a Normally Open
(NO) push button, where rot_enc_s1 and rot_enc_s2 are floating connections to the FPGA.
It is recommended that either a pull up or pull down are configured on these FPGA I/O.
SP305 Spartan-3 Development Platform User Guide
UG216 (v1.1) March 3, 2006
Label
SPI_SCLK
SPI_DIN
SPI_DOUT
SPI_CS
GND
VCC 3.3 v
Caution!
Take care not to scratch or damage the surface of the LCD window. Do not remove
the protective layer of tape on the top of the screen.
Label
LCD_RS
LCD_RW
LCD_E
LCD_DB4
LCD_DB5
LCD_DB6
LCD_DB7
LCD_VEE
www.xilinx.com
DESCRIPTION
SPI CLOCK
SPI DATA IN
SPI DATA OUT
SPI CHIPSELECT
GND
3.3 volts
FPGA Pin
W13
AF12
AA13
AE12
AD12
AB12
AA12
N/A
Detailed Description
FPGA Pin
Jumper
F8
J22-1
E8
J22-2
D8
J22-3
C9
J22-4
GND
J22-5
VCC 3.3v
J22-6
Description
REGISTER SELECT
READ/WRITE
ENABLE
DATA 4
DATA 5
DATA 6
DATA 7
R1
15

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