Vga Output (30) - Xilinx SP305 Spartan-3 User Manual

R
audio with up to 48-kHz sampling. The sampling rate for record and playback can be
different.
Table 2-19: AC97 FPGA Pin Connections
Note:
is designed to be asserted at power-on or upon system reset.
Separate audio jacks are provided for Microphone, Line In, Line Out, and Headphone. All
jacks are stereo except for Microphone jack. The Headphone jack is driven by the audio
codec's internal 50-mW amplifier.
Table 2-20: SP305 Audio Jacks

VGA Output (30)

A VGA output port (P2) is present on the board to support an external video monitor. The
VGA circuitry utilizes a 50-MHz, 24-bit color video DAC (Analog Devices
ADV7125KST50).
Note:
Note:
is connected to IIC_SCL_VGA. Both IIC_SDA_VGA and IIC SCL_VGA are connected respectively to
IIC SDA and IIC SCL through a Zero ohm resistors R159 and R160.
Table 2-21: VGA FPGA Pins
SP305 Spartan-3 Development Platform User Guide
UG216 (v1.1) March 3, 2006
Table 2-19 lists the FPGA pins.
Label
AUDIO_BIT_CLK
AUDIO_SDATA_IN
AUDIO_SDATA_OUT
AUDIO_SYNC
FLASH_AUDIO_RESET_N
The reset for the AC97 codec is shared with the reset signal for the flash memory chips and
Reference
Designator
J11
J12
J13
J14
Table 2-21
The VGA connector does not support plug and play protocol via ID0/ID1 pins.
The VGA connector does support the IIC port where ID1 is connected to IIC_SDA_VGA. NC3
Label
VGA_B0
VGA_B1
VGA_B2
VGA_B3
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FPGA Pin
AE13
AC13
D2
E3
AB13
Table 2-20 summarizes the audio jacks.
Function
Microphone - In
Analog Line - In
Analog Line - Out
Headphone - Out
defines the VGA FPGA pins.
FPGA Pin
D11
B11
A11
L8
Detailed Description
Description
AUDIO CLOCK
DATA IN
DATA OUT
SYNC
RESET
Stereo/Mono
Mono
Stereo
Stereo
Stereo
Description
4.7K to GND
4.7K to GND
4.7K to GND
Blue 3
21