Xilinx Kintex-7 FPGA KC724 User Manual page 56

Gtx transceiver characterization board
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Appendix B: Master Constraints File Listing
56
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set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB18_N]
set_property PACKAGE_PIN B14 [get_ports FMC2_HB19_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB19_P]
set_property PACKAGE_PIN A15 [get_ports FMC2_HB19_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB19_N]
set_property PACKAGE_PIN M24 [get_ports FMC2_HB20_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB20_P]
set_property PACKAGE_PIN M25 [get_ports FMC2_HB20_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB20_N]
set_property PACKAGE_PIN M22 [get_ports FMC2_HB21_P]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB21_P]
set_property PACKAGE_PIN M23 [get_ports FMC2_HB21_N]
set_property IOSTANDARD LVCMOS18 [get_ports FMC2_HB21_N]
#SuperClock2_MODULE
set_property PACKAGE_PIN B24 [get_ports CM_RST]
set_property IOSTANDARD LVCMOS18 [get_ports CM_RST]
set_property PACKAGE_PIN G30 [get_ports CM_CTRL_0]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_0]
set_property PACKAGE_PIN H30 [get_ports CM_CTRL_1]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_1]
set_property PACKAGE_PIN H27 [get_ports CM_CTRL_2]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_2]
set_property PACKAGE_PIN H26 [get_ports CM_CTRL_3]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_3]
set_property PACKAGE_PIN F30 [get_ports CM_CTRL_4]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_4]
set_property PACKAGE_PIN G29 [get_ports CM_CTRL_5]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_5]
set_property PACKAGE_PIN F27 [get_ports CM_CTRL_6]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_6]
set_property PACKAGE_PIN G27 [get_ports CM_CTRL_7]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_7]
set_property PACKAGE_PIN F28 [get_ports CM_CTRL_8]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_8]
set_property PACKAGE_PIN G28 [get_ports CM_CTRL_9]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_9]
set_property PACKAGE_PIN H25 [get_ports CM_CTRL_10]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_10]
set_property PACKAGE_PIN H24 [get_ports CM_CTRL_11]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_11]
set_property PACKAGE_PIN E30 [get_ports CM_CTRL_12]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_12]
set_property PACKAGE_PIN E29 [get_ports CM_CTRL_13]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_13]
set_property PACKAGE_PIN A30 [get_ports CM_CTRL_14]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_14]
set_property PACKAGE_PIN B30 [get_ports CM_CTRL_15]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_15]
set_property PACKAGE_PIN C30 [get_ports CM_CTRL_16]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_16]
set_property PACKAGE_PIN D29 [get_ports CM_CTRL_17]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_17]
set_property PACKAGE_PIN B29 [get_ports CM_CTRL_18]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_18]
set_property PACKAGE_PIN C29 [get_ports CM_CTRL_19]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_19]
set_property PACKAGE_PIN A26 [get_ports CM_CTRL_20]
set_property IOSTANDARD LVCMOS18 [get_ports CM_CTRL_20]
set_property PACKAGE_PIN A25 [get_ports CM_CTRL_21]
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KC724 GTX Transceiver Characterization Board
UG932 (v2.2) October 10, 2014

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