User Leds (Active-High) - Xilinx KCU1250 User Manual

Table 1-11: SuperClock-2 FPGA I/O Mapping (Cont'd)
FPGA(U1)
Pin Function
AP20 Control I/O
AP21 Control I/O
AM24 Control I/O
AN24 Control I/O
AM22 Control I/O
AN22 Control I/O
AM21 Control I/O
AN21 Control I/O
AL24 CM_RESET

User LEDs (Active-High)

DS19 through DS26 (callout 24,
to user I/O pins on the FPGA, as shown in
status (or other functions).
Table 1-12: User LEDs
Pin Function
D18 User LED
D19 User LED
C18 User LED
C19 User LED
B19 User LED
D18 User LED
D19 User LED
C18 User LED
KCU1250 User Guide
UG1057 (v1.0) December 19, 2014
Direction IOSTANDARD
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Output LVCMOS18
Figure
FPGA(U1)
Direction
Output
Output
Output
Output
Output
Output
Output
Output
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Chapter 1: KCU1250 Board Features and Operation
Schematic Net
Name
Pin
CM_H_INT_ALRM 81
CM_C1B 83
CM_C2B 85
CM_C3B 87
CM_C1A 89
CM_C2A 91
CM_H_CS0_C3A 95
CM_H_CS1_C4A 97
CM_RST 66
1-2) are eight active-High LEDs that are connected
Table 1-12. These LEDs can be used to indicate
IOSTANDARD
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
J36 Pin
Function Direction
INT_ALRM Input
C1B Input
C2B Input
C3B Input
C1A Input
C2A Input
CS0_C3A Input
CS1_C4A Input
RESET_B Input
Schematic Reference
Net Name Designator
APP_LED1 DS19
APP_LED2 DS20
APP_LED3 DS21
APP_LED4 DS25
APP_LED5 DS24
APP_LED6 DS23
APP_LED7 DS22
APP_LED8 DS26
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