Setup Register 2 (Sr2) - Texas Instruments OMAP5910 Reference Manual

Dual-core processor microwire interface
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MicroWire Interface
Table 6.

Setup Register 2 (SR2)

Bits
Field
11
CS3_CHK
10−9
CS3_FRQ
8
CS3CS_LVL
7
CS3_EDGE_WR
14
MicroWire Interface
Value
Description
Before activating a write process, determines
if the external device is ready.
0
No check is done and the write process is
immediately executed.
1
If the DI signal is low, the interface considers
the external component busy; if the DI is high,
the interface considers that the first external
component is ready and starts the write
process.
Used when the CS3 is selected.
Defines the frequency of the serial clock,
SCLK, when the CS3 is selected
00
F_INT/2
01
F_INT/4
10
F_INT/8
11
Undefined
Defines the active level of the CS3 chip-select
When the CS3 is selected, this bit defines the
active edge of the serial clock, SCLK, used to
write data to the serial input D0. (Output data
is generated on this edge)
0
Falling (the serial clock is not inverted)
0
Rising (when the serial clock is inverted)
1
Rising (the serial clock is not inverted)
1
Falling (when the serial clock is inverted)
Reset
Value
Undefined
Undefined
0
Undefined
SPRU686

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