Setup Register 3 (Sr3) - Texas Instruments OMAP5910 Reference Manual

Table 6. Setup Register 2 (SR2)
Bits Field
6 CS3_EDGE_RD
5−0 Reserved
Table 7.

Setup Register 3 (SR3)

Bits Field
2−1 CK_FREQ
0 CLK_EN
SPRU686
Value Description
When the CS3 is selected, this bit defines the
active edge of the serial clock, SCLK, used to
read data from the serial input DI. (Input data
is strobed on this edge)
0 Falling (the serial clock is not inverted)
0 Rising (when the serial clock is inverted)
1 Rising (the serial clock is not inverted)
1 Falling (when the serial clock is inverted)
Note:
The content of this register must not be changed when a read or write process is running.
This register sets up the serial interface for the internal clock.
Value Description
Defines the frequency of the internal clock, F_INT, when
the CLK_EN = 1. All the internal logic is controlled by
F_INT (F is the frequency of the external input clock).
00 MPUOXR_CK/2
01 MPUOXR_CK/4
10 MPUOXR_CK/7
11 MPUOXR_CK/10
0 Switch off the clock
1 Switch on the clock
Note:
The content of this register must not be changed when a read or write process is running.
MicroWire Interface
Reset
Value
Undefined
Reset
Value
MicroWire Interface
00
0
15