Microwire Interface; Microwire Registers; Block Diagram - Texas Instruments OMAP5910 Reference Manual

Dual-core processor microwire interface
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1

MicroWire Interface

Figure 1.

Block Diagram

MPUXOR_CK
enable
Setup registers
Control−and−status
register
TIPB
1.1

MicroWire Registers

Table 1.
MicroWire Registers
Register
Description
TDR
Transmit data register
RDR
Receive data register
SPRU686
This serial synchronous interface can drive two serial external components.
For the external devices, this interface is compatible with the MicroWire
standard and is seen as the master (see Figure 1).
A transmit DMA mode is available.
Clock register
Clock
Clock
divider
Control
UWIRE.CS[3:0]
The starting address in the peripheral range (hex) is FFFB:3000
Table 1
lists
the
describe the individual registers.
MicroWire Interface
DMA_REQ to system DMA_REQ[6:0]
2
Inth lvl2 (2,3) - edge
logic
UWIRE.SCLK
MicroWire
registers.
R/W
W
R
Transmit data register
(16 bits)
Receive data register
(16 bits)
Table 2
through
Size
Address
16 bits
FFFB:3000
16 bits
FFFB:3000
MicroWire Interface
UWIRE.SDO
UWIRE.SDI
Table 9
Offset
0x00
0x00
9

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