Setup Register 1 (Sr1) - Texas Instruments OMAP5910 Reference Manual

Dual-core processor microwire interface
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MicroWire Interface
Table 4.
Control-and-Status Register (CSR) (Continued)
Bits
Field
9−5
NB_BITS_WR
4−0
NB_BITS_RD
Table 5.

Setup Register 1 (SR1)

Bits
Field
11−6
Reserved
5
CS0_CHK
4−3
CS0_FRQ
2
CS0CS_LVL
12
MicroWire Interface
Value
Description
Number of bits to transmit
Number of bits to receive
This register sets up the serial interface for the first and the second external
components.
Value
Description
Before activating a write process, determines if the
external device is ready.
0
No check is done and the write process is immediately
executed.
1
If the DI signal is low, the interface considers the
external component busy; if the DI is high, the interface
considers that the first external component is ready and
starts the write process.
Used when the CS0 is selected.
Defines the frequency of the serial clock, SCLK, when
the CS0 is selected (F_INT is the frequency of the
internal clock to the MicroWire control logic as defined in
register SR3).
00
F_INT/2
01
F_INT/4
10
F_INT/8
11
Reserved
Defines the active level of the chip-select by CS0
Reset
Value
Undefined
Undefined
Reset
Value
Undefined
Undefined
0
SPRU686

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