Customizing The Test Bench - Xilinx LogiCORE Getting Started Manual

Ethernet 1000base-x pcs/pma or sgmii v7.0
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Customizing the Test Bench

Changing Frame Data
You can change the contents of the four frames used by the demonstration test bench by
changing the data and valid fields for each frame defined in the test bench. New frames can
be added by defining a new frame of data. Modified frames are automatically updated in
both stimulus and monitor functions.
Changing Frame Error Status
Errors can be inserted into any of the predefined frames in any position by setting the
"error" field to '1' in any column of that frame. Injected errors are automatically updated in
both stimulus and monitor functions.
Changing the Core Configuration
The configuration of the Ethernet 1000BASE-X PCS/PMA core used in the demonstration
test bench can be altered.
Caution:
indefinitely. For example, the demonstration test bench will not Auto-Negotiate with the design
example. Determine the configurations that can safely be used with the test bench.
The core can be reconfigured by editing the injected MDIO frame in the demonstration test
bench. See the Xilinx LogiCORE Ethernet 1000BASE-X PCS/PMA or SGMII User Guide for
information about using the MDIO interface.
Changing the Operational Speed
SGMII can be used to carry ethernet traffic at 10 Mbps, 100 Mbps or 1 Gbps. By default, the
demonstration test bench is configured to operate at 1 Gbps. The speed of both the
example design and test bench can be set to the desired operational speed by editing the
following settings, recompiling the test bench, then running the simulation again.
1 Gbps operation
50
-
the first is a minimum length frame
-
the second is a type frame
-
the third is an errored frame
-
the fourth is a padded frame
The serial data received at the RocketIO transmitter interface is converted to 10-bit
parallel data, then 8B10B decoded. The resultant frames are checked by the PMA
Monitor against the stimulus frames injected into the GMII transmitter to ensure data
integrity.
The same four frames are generated by the PMA Stimulus block. These are 8B10B
encoded, converted to serial data and injected into the RocketIO receiver interface at 1
Gbps.
Data frames received at the GMII receiver are checked by the GMII Monitor against
the stimulus frames injected into the RocketIO receiver to ensure data integrity.
Certain configurations of the core cause the test bench to fail, or to cause processes to run
set speed_is_10_100 to logic 0
www.xilinx.com
Chapter 4: Detailed Example Design
Ethernet 1000BASE-X PCS/PMA or SGMII v7.0
UG145 January 18, 2006

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