Generating The Core - Xilinx LogiCORE Getting Started Manual

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Generating the Core

This sections provides detailed instructions for generating the Ethernet 1000BASE-X
PCS/PMA example design core.
To generate the example design core
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Start the CORE Generator tool.
For general help with starting and using CORE Generator on your system, see the
documentation supplied with ISE, including the Core Generator Guide. These
documents can be downloaded from:
http://www.xilinx.com/support/software_manuals.htm.
Create a new project.
For project options, select the following:
TM
- A Virtex -II Pro part to generate the default Ethernet 1000BASE-X PCS/PMA
core.
- In the Design Entry section, select VHDL or Verilog; then select Other for Vendor.
Locate the Ethernet 1000BASE-X PCS/PMA or SGMII core in the taxonomy tree, listed
under one of the following:
- Communications & Networking/Ethernet
- Communications & Networking/Networking
- Communications & Networking/Telecommunications
Double-click the core.
A warning may appear to indicate the limitations of the Simulation Only Evaluation
license.
Click OK to display the core customization screen.
Figure 3-2: Core Customization Screen
Enter a name for the instance of the core in the Component Name text field
Click Finish to generate the core (with the default options).
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Chapter 3: Quick Start Example Design
Ethernet 1000BASE-X PCS/PMA or SGMII v7.0
UG145 January 18, 2006