Xilinx LogiCORE MicroBlaze Product Manual page 26

Table 4-2: Internal MicroBlaze Parameters Settings
Parameter Name
C_FAMILY
C_AREA_OPTIMIZED
C_INTERCONNECT
C_ENDIANNESS
C_FAULT_TOLERANT
C_LOCKSTEP_SLAVE
C_AVOID_PRIMITIVES
C_PVR
C_RESET_MSR
C_INSTANCE
C_D_PLB
C_D_AXI
C_D_LMB
C_I_PLB
C_I_AXI
C_I_LMB
C_USE_BARREL
C_USE_DIV
C_USE_HW_MUL
C_USE_FPU
C_USE_MSR_INSTR
C_USE_PCMP_INSTR
C_USE_REORDER_INSTR
MicroBlaze Micro Controller System v1.3
PG048 December 18, 2012
Chapter 4: Customizing and Generating the Core
Feature/Description
Target family
Select implementation to optimize area
with lower instruction throughput
Select interconnect
1 = PLBv46
Select endianness (1 = Little endian)
Implement fault tolerance
Lockstep Slave
Disallow FPGA primitives
Processor version register mode
selection
All other PVR parameters are don't care.
Reset value for MSR register
Instance Name
Data side PLB interface.
All other data side PLB parameters are
don't care.
Data side AXI interface
All other data side AXI parameters are
don't care.
Data side LMB interface
Instruction side PLB interface.
All other instruction side PLB parameters
are don't care.
Instruction side AXI interface.
All other instruction side AXI parameters
are don't care.
Instruction side LMB interface
Include barrel shifter
Include hardware divider
Include hardware multiplier
Include hardware floating point unit
Enable use of instructions: MSRSET and
MSRCLR
Enable use of instructions: CLZ, PCMPBF,
PCMPEQ, and PCMPNE
Enable use of instructions: LBUR, LHUR,
LWR, SBR,SHR, SWR, SWAPB, and SWAPH
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Value
Value of MicroBlaze MCS
parameter C_FAMILY
1
1
1
0
0
0
0
0x00
Value of MicroBlaze MCS
parameter
C_MICROBLAZE_INSTANCE
0
0
1
1
0
1
0
0
0
0
0
0
0
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