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Data write to I/O Module registers is performed the clock cycle after the MicroBlaze store
instruction is executed.
Data accesses to peripherals connected on the I/O Bus take three clock cycles plus the
number of wait states introduced by the accessed peripheral.
Throughput
The maximum throughput when using the I/O Bus is one read or write access every three
clock cycles.
Resource Utilization
Because the MicroBlaze MCS is a module that is used together with other parts of the
design in the FPGA, the utilization and timing numbers reported in this section are just
estimates, and the actual utilization of FPGA resources and timing of the MicroBlaze MCS
design will vary from the results reported here. All parameters not given in
their default values.
Table 2-2: Performance and Resource Utilization Benchmarks on Virtex-6 (xc6vlx240t-1-ff1156)
Parameter Values (other parameters at default value)
1
1
0
0
1
1
1
5
1
1
1
5
1
1
1
5
1
1
1
5
1
1
1
5
1
1
1
5
1
1
1
5
MicroBlaze Micro Controller System v1.3
PG048 December 18, 2012
0
0
0
0
0
0
0
0
0
0
1
65000
0
0
0
1
65000
1
32
0
1
65000
1
32
1
1
65000
1
32
1
1
65000
1
32
1
1
65000
1
32
1
www.xilinx.com
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
32
0
0
0
0
32
1
32
0
0
32
1
32
1
0
32
1
32
1
1
Chapter 2: Product Specification
Table 2-2
Device Resources
LUTs
Flip-Flops
546
276
606
340
620
353
656
441
658
473
659
505
675
610
882
946
have
8
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