Xilinx LogiCORE MicroBlaze Product Manual page 60

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Step:
Tool:
Error messages:
Possible causes:
Corrective action:
Step:
Tool:
Error message:
Possible causes:
Corrective action:
Step:
Tool:
Error message:
Possible causes:
Corrective actions: • Run Data2MEM manually to create simulation files, or invoke the
Step:
Tool:
Error message:
Possible causes:
MicroBlaze Micro Controller System v1.3
PG048 December 18, 2012
Update Bitstream with Software
Data2MEM
ERROR:Data2MEM:31 - Out of bounds code segment for ram space in
'BMM-filename'.
Memory space 'component-name.lmb_bram' occupies [address-range]
Code segment index occupies [address-range]
The MicroBlaze MCS core memory size is smaller than the size used when creating
the software application.
• Increase the memory size in the MicroBlaze MCS configuration dialog.
• Open SDK to automatically detect the changed hardware configuration, and build
the program for the available memory size. Should the program not fit in
available memory, an error will occur. In this case, increase the memory size in the
MicroBlaze MCS configuration dialog.
Generate Bitstream
Bitgen
The design 'toplevel.ncd' is missing any BMM information for given block RAM data
files. BRAMs cannot be initialized with the given data without BMM information.
Either BMM information must be given to NGDBuild with a '-bm' option, or
embedded BMM information must be included in the source HDL.
The design has been implemented without the Ngdbuild -bm option to define the
BMM file, but with the Bitgen -bd option to define the used ELF files.
Add the Ngdbuild option, either manually, or by invoking the microblaze_mcs_setup
command, and then implement the design again.
Simulate Software
ISim
ERROR:HDLCompiler:1030 - "path/vhdl/src/unisims/primitive/RAMB16BWER.vhd"
Line 681: Cannot open file 'int_infile'.
The MEM files have not been generated, or are not located in the correct place.
microblaze_mcs_data2mem command with the appropriate ELF files as
arguments.
• Move the MEM files to the correct place. In PlanAhead, the files are placed in the
sim_1 simulation set directory by default. If another simulation set is used, they
must be moved to that directory.
Simulate Software
ModelSim
ERROR:Simulator:777 - Static elaboration of top level VHDL design unit tb in library
work failed
** Fatal: (vsim-7) Failed to open VHDL file "component-name.lmb_bram_index.mem"
in r mode.
The MEM files have not been generated.
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Appendix B: Debugging
59

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