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This flow shows the specific steps required to implement a project with the MicroBlaze MCS
in Vivado, and the relationship between the hardware and software tools.
•
Associate ELF Files:
This is the only manual step in Vivado, performed by selecting Tools > Associate ELF
Files... in the menu. Initially, the default infinite loop ELF file, mb_bootloop_le.elf, is
associated with the MicroBlaze MCS core. ELF files for implementation and simulation
are specified separately.
The associated ELF files are imported into the project. This means that they are unaffected
Note:
by changes during software development in SDK, but need to be re-imported to apply any
changes.
The final bitstream updated with software is named download.bit, and is normally located
in the project directory project-name.runs/impl_1.
For additional information, see the Xilinx Vivado Manuals
SDK
The SDK commands to achieve the MicroBlaze MCS specific steps above are detailed here:
•
Import Hardware Description - For each MicroBlaze MCS component to import:
Select File > New > Project... in the menu.
°
Expand Xilinx, and select Hardware Platform Specification.
°
Click Next.
°
Click Browse, and navigate to the hardware description file:
°
-
In PlanAhead™ this file is typically called project-name.srcs/sources_1/
ip/component-name/component-name_sdk.xml.
-
In Project Navigator this file is typically called ipcore_dir/
component-name_sdk.xml.
Click Finish to perform the import.
°
After the hardware description has been imported, a standalone board support package
can be created, which provides MicroBlaze processor-specific code, and the I/O Module
software driver. The MicroBlaze MCS configuration is available in the generated file
microblaze_0/include/xparameters.h.
•
Import Hardware Implementation:
Select Xilinx Tools > Program FPGA in the menu.
°
Click the first Browse button, and navigate to the bitstream:
°
MicroBlaze Micro Controller System v1.3
PG048 December 18, 2012
Chapter 4: Customizing and Generating the Core
www.xilinx.com
[Ref
9].
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