B1 Connector Pinout - Xilinx Spartan-3 User Manual

Expansion Connectors

B1 Connector Pinout

The B1 expansion connector is located on the right edge of the board, as indicated by
Figure
specified in parentheses.
Most of the B1 expansion connector pins connect only with the FPGA and are not shared.
Pins 36 through 40 include the signals required to configure the FPGA in Master or Slave
Serial mode. These same pins plus pins 5, 7, 9, 11, 13, 15, 17, 19, and 20 provide the signals
required to configure the FPGA in Master or Slave Parallel mode.
Table 13-4: Pinout for B1 Expansion Connector
Schematic Name
GND
V (+3.3V)
CCO
PB-DB0
PB-DB1
PB-DB2
PB-DB3
PB-DB4
PB-DB5
PB-DB6
PB-DB7
PB-CLK
MB1-DB1
MB1-DB3
MB1-DB5
MB1-DB7
MB1-DSTB
MB1-WAIT
MB1-INT
DONE
CCLK
Spartan-3 Starter Kit Board User Guide
UG130 (v1.1) May 13, 2005
1-2. Table 13-4 provides the pinout for the B1 connector. The FPGA connections are
FPGA Pin
V (all banks)
CCO
(T3)
FPGA RD_WR_B config
(N11)
FPGA D1 config
(P10)
FPGA D2 config
(R10)
FPGA D3 config
(T7)
FPGA D4 config
(R7)
FPGA D5 config
(N6)
FPGA D6 config
(M6)
FPGA D7 config
(C15)
(D15)
(E15)
(F15)
(G16)
(H16)
(K16)
(L15)
(R14)
FPGA DONE
(T15)
FPGA CCLK
Connects to (A14) via
390Ω resistor
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Connector FPGA Pin
1 2
3 4 (C10)
(E10)
5 6
(C11)
7 8
(D11)
9 10
(C12)
11 12
(D12)
13 14
(E11)
15 16
(B16)
17 18
(R3)
19 20
FPGA CS_B config
21 22 (C16)
23 24 (D16)
25 26 (E16)
27 28 (G15)
29 30 (H15)
31 32 (J16)
33 34 (K15)
(B3)
35 36
FPGA PROG_B
(N9)
37 38
FPGA INIT_B
(M11)
39 40
R
in
19
Schematic Name
VU (+5V)
PB-ADR0
PB-ADR1
PB-ADR2
PB-ADR3
PB-ADR4
PB-ADR5
PB-WE
PB-OE
PB-CS
MB1-DB0
MB1-DB2
MB1-DB4
MB1-DB6
MB1-ASTB
MB1-WRITE
MB1-RESET
PROG-B
INIT
DIN
51