Signal Timing For A 60Hz, 640X480 Vga Display - Xilinx Spartan-3 User Manual

R
Table 5-1: VGA Port Connections to the Spartan-3 FPGA
Each color line has a series resistor to provide 3-bit color, with one bit each for Red, Green,
and Blue. The series resistor uses the 75Ω VGA cable termination to ensure that the color
signals remain in the VGA-specified 0V to 0.7V range. The HS and VS signals are TTL level.
Drive the R, G, and B signals High or Low to generate the eight possible colors shown in
Table
Table 5-2: 3-Bit Display Color Codes
VGA signal timing is specified, published, copyrighted, and sold by the Video Electronics
Standards Association (VESA). The following VGA system and timing information is
provided as an example of how the FPGA might drive VGA monitor in 640 by 480 mode.
For more precise information or for information on higher VGA frequencies, refer to
documents available on the VESA website or other electronics websites:
•
•

Signal Timing for a 60Hz, 640x480 VGA Display

CRT-based VGA displays use amplitude-modulated, moving electron beams (or cathode
rays) to display information on a phosphor-coated screen. LCD displays use an array of
switches that can impose a voltage across a small amount of liquid crystal, thereby
changing light permitivity through the crystal on a pixel-by-pixel basis. Although the
following description is limited to CRT displays, LCD displays have evolved to use the
22
Signal
Red (R)
Green (G)
Blue (B)
Horizontal Sync (HS)
Vertical Sync (VS)
5-2.
Red (R) Green (G)
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
Video Electronics Standards Association
http://www.vesa.org
VGA Timing Information
http://www.epanorama.net/documents/pc/vga_timing.html
www.xilinx.com
1-800-255-7778
FPGA Pin
Blue (B) Resulting Color
0
Black
1
Blue
0
Green
1
Cyan
0
Red
1
Magenta
0
Yellow
1
White
Chapter 5: VGA Port
R12
T12
R11
R9
T10
Spartan-3 Starter Kit Board User Guide
UG130 (v1.1) May 13, 2005