R
FPGA Configuration Modes and
Functions
FPGA Configuration Mode Settings
In most applications for the Spartan-3 Starter Kit Board, the FPGA automatically boots
from the on-board Platform Flash memory whenever power is applied or the PROG push
button is pressed. However, the board supports all the available configuration modes via
the J8 header, indicated as
settings for the J8 header. Additionally, the JP1 jumper setting is required when using
Master Serial configuration mode, as further described in
(JP1)."
The default jumper settings for the board are:
•
•
Table 9-1: Header J8 Controls the FPGA Configuration Mode
Configuration
Header J8
Mode
Settings
<M0:M1:M2>
Master Serial
GND
<0:0:0>
M0 M1 M2
Slave Serial
GND
<1:1:1>
M0 M1 M2
Master Parallel
GND
<1:1:0>
M0 M1 M2
36
All jumpers in the J8 header are installed
The JP1 jumper is in the "Default" position
Jumper JP1
Setting
DEFAULT. The FPGA automatically boots from the Platform
JP1
J8
Flash.
or
JP1
The FPGA attempts to boot from a serial configuration source
JP1
attached to either expansion connector A2 or B1.
Another device connected to either the A2 or B1 expansion
JP1
J8
connector provides serial data and clock to load the FPGA.
The FPGA attempts to boot from a parallel configuration source
J8
JP1
attached to the B1 expansion connector.
www.xilinx.com
1-800-255-7778
Chapter 9: FPGA Configuration Modes and Functions
in
Figure
1-2.
Table 9-1
16
Description
Spartan-3 Starter Kit Board User Guide
Chapter 9
provides the available option
"Platform Flash Jumper Options
UG130 (v1.1) May 13, 2005
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