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Philips Semiconductors
Clock cycle
SPICLK (CPOL = 0)
SPICLK (CPOL = 1)
DORD = 0
MOSI (input)
DORD = 1
DORD = 0
MISO (output)
DORD = 1
SS (if SSIG bit = 0)
(1) Not defined
Fig 42. SPI slave transfer format with CPHA = 0.
User manual
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Rev. 03 — 7 June 2005
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UM10119
P89LPC938 User manual
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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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