Boot Vector Register; Boot Status Register - Philips P89LPC938 User Manual

Philips Semiconductors
Table 120: Effects of Security Bits
EDISx SPEDISx
0 0
0 0
0 1
1 x

19.19 Boot Vector register

Table 121: Boot Vector (BOOTVEC) bit allocation
Bit 7
Symbol -
Factory default 0
value
Table 122: Boot Vector (BOOTVEC) bit description
Bit Symbol Description
0:4 BOOTV[0:4] Boot vector. If the Boot Vector is selected as the reset address, the P89LPC938 will start execution at an
address comprised of 00h in the lower eight bits and this BOOTVEC as the upper eight bits after a reset.
5:7 - reserved

19.20 Boot status register

Table 123: Boot Status (BOOTSTAT) bit allocation
Bit 7
Symbol DCCP
Factory default 0
value
Table 124: Boot Status (BOOTSTAT) bit description
Bit Symbol Description
0 BSB Boot Status Bit. If programmed to logic 1, the P89LPC938 will always start execution at an address
comprised of 00H in the lower eight bits and BOOTVEC as the upper bits after a reset. (See
"Reset
1:4 - reserved
User manual
MOVCDISx Effects on Programming
0 None.
1 Security violation flag set for sector CRC calculation for the specific sector.
Security violation flag set for global CRC calculation if any MOVCDISx bit is set.
Cycle aborted. Memory contents unchanged. CRC invalid. Program/erase
commands will not result in a security violation.
x Security violation flag set for program commands or an erase page command.
Cycle aborted. Memory contents unchanged. Sector erase and global erase are
allowed.
x Security violation flag set for program commands or an erase page command.
Cycle aborted. Memory contents unchanged. Global erase is allowed.
6 5
- -
0 0
6 5
CWP AWP
0 0
vector").
Rev. 03 — 7 June 2005
4 3 2
BOOTV4 BOOTV3 BOOTV2
1 1 1
4 3 2
- - -
0 0 0
UM10119
P89LPC938 User manual
1 0
BOOTV1 BOOTV0
1 1
1 0
-- BSB
0 1
Section 7.1
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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