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Philips Semiconductors
The 13-bit register consists of all 8 bits of THn and the lower 5 bits of TLn. The upper 3
bits of TLn are indeterminate and should be ignored. Setting the run flag (TRn) does not
clear the registers.
Mode 0 operation is the same for Timer 0 and Timer 1. See
different GATE bits, one for Timer 1 (TMOD.7) and one for Timer 0 (TMOD.3).
8.2 Mode 1
Mode 1 is the same as Mode 0, except that all 16 bits of the timer register (THn and TLn)
are used. See
8.3 Mode 2
Mode 2 configures the Timer register as an 8-bit Counter (TLn) with automatic reload, as
shown in
contents of THn, which must be preset by software. The reload leaves THn unchanged.
Mode 2 operation is the same for Timer 0 and Timer 1.
8.4 Mode 3
When Timer 1 is in Mode 3 it is stopped. The effect is the same as setting TR1 = 0.
Timer 0 in Mode 3 establishes TL0 and TH0 as two separate 8-bit counters. The logic for
Mode 3 on Timer 0 is shown in
T0GATE, TR0, INT0, and TF0. TH0 is locked into a timer function (counting machine
cycles) and takes over the use of TR1 and TF1 from Timer 1. Thus, TH0 now controls the
'Timer 1' interrupt.
Mode 3 is provided for applications that require an extra 8-bit timer. With Timer 0 in Mode
3, an P89LPC938 device can look like it has three Timer/Counters.
Note: When Timer 0 is in Mode 3, Timer 1 can be turned on and off by switching it into and
out of its own Mode 3. It can still be used by the serial port as a baud rate generator, or in
any application not requiring an interrupt.
8.5 Mode 6
In this mode, the corresponding timer can be changed to a PWM with a full period of 256
timer clocks (see
Note that interrupt can still be enabled on the low to high transition of TFn, and that TFn
can still be cleared in software like in any other modes.
User manual
Figure
16.
Figure
17. Overflow from TLn not only sets TFn, but also reloads TLn with the
Figure
19). Its structure is similar to mode 2, except that:
•
TFn (n = 0 and 1 for Timers 0 and 1 respectively) is set and cleared in hardware;
•
The low period of the TFn is in THn, and should be between 1 and 254, and;
•
The high period of the TFn is always 256−THn.
•
Loading THn with 00h will force the Tx pin high, loading THn with FFh will force the Tx
pin low.
Rev. 03 — 7 June 2005
Figure
18. TL0 uses the Timer 0 control bits: T0C/T,
UM10119
P89LPC938 User manual
Figure
15. There are two
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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