External Clock Input Option - Philips P89LPC938 User Manual

Philips Semiconductors

2.6 External clock input option

In this configuration, the processor clock is derived from an external source driving the
XTAL1 / P3.1 pin. The rate may be from 0 Hz up to 18 MHz. The XTAL2 / P3.0 pin may be
used as a standard port pin or a clock output. When using an oscillator frequency
above 12 MHz, the reset input function of P1.5 must be enabled. An external circuit
is required to hold the device in reset at power-up until V
specified level. When system power is removed V
specified operating voltage. When using an oscillator frequency above 12 MHz, in
some applications, an external brownout detect circuit may be required to hold the
device in reset when V
Fig 6. Using the crystal oscillator.
Fig 7. Block diagram of oscillator control.
User manual
DD
Note: The oscillator must be configured in one of the following modes: Low frequency crystal,
medium frequency crystal, or high frequency crystal.
(1) A series resistor may be required to limit crystal drive levels. This is especially important for low
frequency crystals (see text).
HIGH FREQUENCY
XTAL1
MEDIUM FREQUENCY
XTAL2
LOW FREQUENCY
RCCLK
RC
OSCILLATOR
(7.3728 MHz ±1 %)
WATCHDOG
OSCILLATOR
+20%
(400 kHz )
−30 %
TIMER 0 AND
TIMER 1
Rev. 03 — 7 June 2005
falls below the minimum specified operating voltage.
quartz crystal or
ceramic resonator
XTAL1
(1)
XTAL2
OSCCLK
DIVM
PCLK
2
I C-BUS SPI
UM10119
P89LPC938 User manual
has reached its
DD
will fall below the minimum
DD
P89LPC932A1
002aab008
CCLK
÷2
PCLK
WDT
32 × PLL
UART (P89LPC932A1)
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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