Mode 2; Mode 3; Sfr Space; Baud Rate Generator And Selection - Philips P89LPC938 User Manual

Single-chip microcontroller
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11.3 Mode 2

11 bits are transmitted (through TXD) or received (through RXD): start bit (logic 0), 8 data
bits (LSB first), a programmable 9th data bit, and a stop bit (logic 1). When data is
transmitted, the 9th data bit (TB8 in SCON) can be assigned the value of 0 or 1. Or, for
example, the parity bit (P, in the PSW) could be moved into TB8. When data is received,
the 9th data bit goes into RB8 in Special Function Register SCON and the stop bit is not
saved. The baud rate is programmable to either
determined by the SMOD1 bit in PCON.

11.4 Mode 3

11 bits are transmitted (through TXD) or received (through RXD): a start bit (logic 0), 8
data bits (LSB first), a programmable 9th data bit, and a stop bit (logic 1). Mode 3 is the
same as Mode 2 in all respects except baud rate. The baud rate in Mode 3 is variable and
is determined by the Timer 1 overflow rate or the Baud Rate Generator (see
"Baud Rate generator and selection" on page
In all four modes, transmission is initiated by any instruction that uses SBUF as a
destination register. Reception is initiated in Mode 0 by the condition RI = 0 and REN = 1.
Reception is initiated in the other modes by the incoming start bit if REN = 1.

11.5 SFR space

The UART SFRs are at the following locations:
Table 61:
Register
PCON
SCON
SBUF
SADDR
SADEN
SSTAT
BRGR1
BRGR0
BRGCON

11.6 Baud Rate generator and selection

The P89LPC938 enhanced UART has an independent Baud Rate Generator. The baud
rate is determined by a value programmed into the BRGR1 and BRGR0 SFRs. The UART
can use either Timer 1 or the baud rate generator output as determined by BRGCON[2:1]
(see
set. The independent Baud Rate Generator uses CCLK.
User manual
UART SFR addresses
Description
Power Control
Serial Port (UART) Control
Serial Port (UART) Data Buffer
Serial Port (UART) Address
Serial Port (UART) Address Enable
Serial Port (UART) Status
Baud Rate Generator Rate High Byte
Baud Rate Generator Rate Low Byte
Baud Rate Generator Control
Figure
26). Note that Timer T1 is further divided by 2 if the SMOD1 bit (PCON.7) is
Rev. 03 — 7 June 2005
UM10119
P89LPC938 User manual
1
1
or
of the CCLK frequency, as
16
32
66).
SFR location
87H
98H
99H
A9H
B9H
BAH
BFH
BEH
BDH
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Section 11.6
66 of 139

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