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Philips Semiconductors
Table 38:
Timer/Counter Control register (TCON) - address 88h) bit allocation
Bit
7
Symbol
TF1
Reset
0
Table 39:
Timer/Counter Control register (TCON - address 88h) bit description
Bit Symbol
Description
0
IT0
Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level triggered external
interrupts.
1
IE0
Interrupt 0 Edge flag. Set by hardware when external interrupt 0 edge is detected. Cleared by hardware
when the interrupt is processed, or by software.
2
IT1
Interrupt 1 Type control bit. Set/cleared by software to specify falling edge/low level triggered external
interrupts.
3
IE1
Interrupt 1 Edge flag. Set by hardware when external interrupt 1 edge is detected. Cleared by hardware
when the interrupt is processed, or by software.
4
TR0
Timer 0 Run control bit. Set/cleared by software to turn Timer/Counter 0 on/off.
5
TF0
Timer 0 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when the processor
vectors to the interrupt routine, or by software. (except in mode 6, where it is cleared in hardware)
6
TR1
Timer 1 Run control bit. Set/cleared by software to turn Timer/Counter 1 on/off
7
TF1
Timer 1 overflow flag. Set by hardware on Timer/Counter overflow. Cleared by hardware when the interrupt
is processed, or by software (except in mode 6, see above, when it is cleared in hardware).
PCLK
Tn pin
TRn
Gate
INTn pin
Fig 15. Timer/counter 0 or 1 in Mode 0 (13-bit counter).
PCLK
Tn pin
TRn
Gate
INTn pin
Fig 16. Timer/counter 0 or 1 in mode 1 (16-bit counter).
User manual
6
5
TR1
TF0
0
0
C/T = 0
C/T = 1
C/T = 0
C/T = 1
Rev. 03 — 7 June 2005
4
3
TR0
IE1
0
0
overflow
TLn
THn
(5-bits)
(8-bits)
control
toggle
overflow
TLn
THn
(8-bits)
(8-bits)
control
toggle
UM10119
P89LPC938 User manual
2
1
IT1
IE0
0
0
interrupt
TFn
Tn pin
ENTn
002aaa919
interrupt
TFn
Tn pin
ENTn
002aaa920
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
0
IT0
0
48 of 139
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