HP 85662A Troubleshooting And Repair Manual page 279

Spectrum analyzer if-display section
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-12 VlV Adjustments @I
The PIN Diode Attenuator adjustment (ATTEN potentiometer R61) is essentially a gain
adjustment that varies the slope of the log curve. The -12 VTV adjustment (-12 VTV
potentiometer R91 in the Temperature-Dependent Regulators circuit) varies the offset and
slope of the log curve. These two adjustments (which interact) are used to set the output
versus input curve in log mode. The IF input signal level, which causes a 1 V (full screen)
output in LINEAR mode, is used as a reference for full-scale deflection in LOG mode. The
LINEAR modes for the same IF input signal level, and a 100 mV video output change for a 10
Detector @
an associated circuitry form a full wave rectifier to convert the IF signal to
a video signal. Q4 is the current driver for the detector and converts voltage variations at
the Q5 emitter to current variations which drive Q2 and Q3. Q3 is a half wave rectifier and
conducts when the signal at the Q5 emitter is positive. The Q3 collector current is applied to
the low-pass filter consisting of R75, R76, L12 through L14, and C51 through C54. When the
signal at the Q5 collector goes negative, current generated in the Q4 collector is pulled out of
the Q2 emitter. Ql forms a current mirror, which drives current into the low-pass filter when
Q2 collector current flows. Thus current flows into the low-pass filter on both positive and
negative halves of the IF signal at the Q5 emitter. CR31, CR32, CR33, and R72 keep Q2 and
Q3 biased slightly below cutoff. When current flows into the low-pass filter from Ql or Q3, a
positive voltage is developed across R75 and R76. The voltage developed is proportional to
the IF signal level at the Q5 emitter. The low-pass filter has a bandwidth of about 7 MHz to
remove IF frequencies from the detected video output signal. The detected voltage is applied
to unity gain buffer amplifier Q12 and Q13 to drive A4Al Video Processor. The offset of
differential pair Q12 is removed by ZERO adjustment R79.
Counter Output Limiter @
The Counter Output Limiter provides an amplitude-limited signal at the IF frequency used
for frequency counting. The IF signal from detector driver Q5 is buffered by QS. CR35 and
CR36 are biased to cutoff for signal levels corresponding to greater than a one-division display.
In LOG or LINEAR mode, the counter output remains at approximately -30 dBm for signal
levels displayed in the top nine divisions of the display.

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