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Fast Scan Trigger Detect @I
This circuit is used to detect the occurrence of a fast scan trigger. When LRTRC, the retrace
signal, goes high, a fast scan has been triggered. Flip-flop U18B is set by the positive edge of
LRTRC. U18B is reset by LRSTO.
Bus Buffer (ij
This circuit buffers status signals onto the Digital Storage Bus.
The A3A2 Intensity Control Assembly modulates the Z-Axis intensity, controls the A3A3 Line
Generator drawing period, controls the display blanking, and multiplexes Digital Storage with
the fast sweep video for sweep times less than 20 ms.
Digital Storage Test program 4 is used to troubleshoot this assembly. Table l-l lists the
voltages that are present at various nodes in the Line Generator Z-Axis 0. Depending on
the persistence of the oscilloscope, the waveforms will appear either as dots or vertical line
segments. If any of the sample and hold FETs A3A2 Ql to Q4 are defective, it is easier to
replace all four than to isolate the defective component.
Pl-36
LL (CW) $2 V to -6 V
SL (CCW) +5 V to -6 V
Disabling the blanking signal can be helpful when troubleshooting labels that are shifted from
their proper positions. This is done by grounding one input to U7D. This can be accomplished
without removing the board by running a jumper from ground to A3A2R32, the resistor
nearest to the LG/FS CAL connector, A3A2J2.
The following program draws either a horizontal or a vertical line on the CRT. It is useful for
troubleshooting problems associated with dynamic operation of the Z-Axis Line Generator. A
better understanding of the operation of the Z-Axis Line Generator will be gained by keying
in this program and observing the waveforms while reading the circuit description.
4
Table l-l. Line Generator Z-Axis Voltages
U17 Pin 6
V to +6
-0.5
V $2
V to +6 V +2 V to -9 V -0.5 V to +9 V 0 to +9 v 0 to
-0.5
Pl-34
U16 Pin 6
V to -9
V to +9 V 0 to $9 V 0 to +6 V
V -0.5
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