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Track and Hold @
The Track and Hold circuit samples the signal appearing at the output of multiplexer Ul and
holds the voltage on capacitor (215. The output of the Track and Hold circuit is used in A3A8
Analog-Digital Converter, where it is converted into Y-axis graph data. A simplified schematic
of the Track and Hold circuit is shown in Figure 3.
the amplifier and holding capacitor C15. A FET input amplifier (Q13, US) amplifies the
capacitor voltage by a factor of 10. The gain is set the T/H GAIN potentiometer R57. Offset
is adjusted by controlling the current flow through R67 with (T/H) OFS potentiometer R59.
Figure 3. Track and Hold Circuit, Simplified Schematic
T O A3A8
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