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pattern can be generated independently of the main processor in the RF Section (Al5
Controller). To enable the test pattern:
a. Jumper A3A6TP3 and A3A6TP6. (Turns on the test ROMs.)
b. Push A3A7Sl to initialize.
If troubleshooting without the RF Section or with the Analyzer Bus Interconnect cable W31
disconnected, AlA8TPl and AlA8TP2 must be jumpered to turn on the power supplies.
If the CRT remains blank, AlA6TP6 and AlA6TP7 may have to be jumpered to inhibit the
CRT disable line controlled by the Al5 Controller.
Failure Analysis and Testing Sequence
INSTR CHECK LED I and the Digital Storage test pattern can be used together to determine
in what area of the Digital Storage Section a failure exists. See "Digital Storage Failure Tests"
in this chapter. Failure symptoms (and troubleshooting information for each) are as follows:
2
A3
Figure 1. Typical Digital Storage Test Pattern
Table l-l. Digital Storage Test Pattern
Test Pattern Test Pattern
CHECK LED I ON
CHECK LED I OFF
Correct
Incorrect/No
See (2)
See (1)
See (4)
See (3)
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