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Mnemonic
18.4 MHz Local Oscillator
Signal
1 MHz ADC Clock
21.4 MHz IF Signal
3MHZ
3 MHz IF Signal
A LOG
Log Expand Control
Accumulator Bus Bits 0
through 11
Attenuation Controls
through 3
Auxiliary Blanking Output
4ux z
Auxiliary Z Axis Output
Attenuation Control
3 LOG
Log Expand Control
30-Bll
Digital Storage Bus Data Bits
Branch Length Bus Bits 0
3LINK
Blink CRT Display Control
3RIGHT
Bright CRT Display Control
3s
3andwidth Controls
I MHz System Clock
'REQ ZERO
'S
'SOUT
A3 Digital Storage Mnemonic Table
Mnemonic
FSZ
HLDX
HLDY
HOLD
HSWP
ICLK
LBLANK
LCLK
Description
Fast Sweep Z Axis
Hold X Position (Sample and
Hold Control)
Hold Y Position (Sample and
Hold Control)
Track and Hold Control
HIGH=Sweeping
Indicator Clock (Front-Panel
Input Selection Bit A
Input Selection Bit B
Integrator Control
Interrupt
Instrument Bus Data Bits 0
through 15
I/O Port Input/Output
Control
Constant Selection Bits 0
through 3
Link State Bus Bits 0 through
7
LOW=Enable ADC Output
Inverted CLK
Load Character Register
Load Expand Register
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