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Fast Sweep Control (6~
The Fast Sweep Control contains circuitry for end of sweep detection and controls fast sweep
dead time, and fast sweep triggering.
End of Sweep Detection
When the sweep ramp reaches about +2.2 V, Q5 conducts and turns Q4 on. When the
collector of Q4 goes low, UlB pin 5 produces a pulse whose length is the dead time. UlOA
and UlOB are cleared when UlOA pin 5 goes low, and timing capacitors C4 and C5 are
discharged by the Discharge Switch in the Fast Sweep Generator. Voltage divider R19 and
R20 set the level at which Q5 senses the end of the sweep ramp. (Note that the fast sweep
ramp ends beyond the right-hand edge of the CRT.) The LRTRC line from UlOA pin 5, which
is high during the sweep, supplies the retrace blanking signal to A3A2 Intensity Control.
Fast Sweep Dead Time
Multivibrator UlB controls the sweep dead time. UlB is triggered at the end of the fast
sweep ramp and holds UlOA and UlOB cleared for a time that is determined by C7, R24, and
R25. This prevents the triggering of further ramps for the length of the pulse from UlB pin
5. The length of the dead time is about 15 ps for sweep times from 1 ps through 100 ps and
about 120 ps for sweep times from 200 /.LS through 10 ms. The ST 100 line (from U6 pin 12 in
the Fast Sweep Time Control circuit) controls the length of the sweep dead time by switching
the UlB timing resistors with transistor switch Q3. In sweep times of 10 ms through 200 ps,
Q3 is off and the dead time, set by C7 and R24, is 120 ps. In sweep times of 100 ps through
1 ps, Q3 is on, placing R25 in parallel with R24 to decrease the dead time to 15 ,!Ls. C6 and
R23 supply additional base drive to Q4 at the end of the sweep to insure triggering of UlB.
Fast Sweep Triggering
Flip-flops UlOA and UlOB control the state of the fast sweep generator. UlOA controls the
Discharge Switch through inverter/buffer U7D. At the end of a fast sweep, both UlOA and
a trigger from U16 pin 5 causes UlOB pin 7 to go low. This causes UlOA pin 5 to go high,
which turns off the Discharge Switch and starts a sweep ramp. This can occur only if FS EN
is high. If FS EN is low, the J and K inputs of UlOB are held low and a trigger wiII not set
Fast Sweep Multiplexing
In Fast Sweep mode, the X output of A3A3 Line Generator and the fast sweep ramp must
be multiplexed to AlA X Deflection Amplifier or AlA XYZ Driver Amplifier to produce a
display consisting of the graticule and characters with the fast sweep ramp and the analog
video signal. The video signal from A4Al Video Processor is multiplexed to AlA Y
Deflection Amplifier or AlA XYZ Driver Amplifier when the fast sweep ramp is multiplexed
to AlA or AlA2. The X and Y multiplexers are located in A3A2 Intensity Control.
In Fast Sweep mode, the output from A3A3 is applied to the CRT deflection amplifiers
following the completion of at least one fast sweep ramp.
5
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