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Control Decoder @
Multiplexer/Bus Driver @
U6, U8, and UlO form a 12-bit Bus Driver with two data inputs. Data from the RAM Bus or
from the Accumulator Bus may be transferred to the main Digital Storage Bus through these
drivers.
To verify proper operation of A3A5 Data Manipulator, first use Test Program 2, with the
qualifier feedback disabled, to verify the qualifier select circuitry on A3A7. The next check
uses Test Program 3 to check the Data Manipulator Bus output at the connector and the
LZERO output at U14 pin 9. (Since Test Program 3 is the first program to use the qualifier
and the normal interrupt, the INTR line from A3A2 to A3A6U16 pin 10 and the buffered
qualifier A3A6U27 might have to be checked. The INTR line should be a 50 kHz signal.)
On all previous checks, they have not been enabled, so that the Source bus was always the
Constant ROM output. Test Program 5, though, enables U5 and Ull so they can be checked.
This also checks that the Constant ROM outputs can be disabled.
Test Program 1 checks the Accumulator, Control Decode logic, Pipeline Registers, and parts
of the ALU, Constant ROM, and the Multiplexer Bus Driver. The Register RAM outputs
are disabled by A3A5TP2 being grounded; thus, they should be high. This eliminates the
feedback from the data bus back into the A3A5 Data Manipulator.
Troubleshooting the Digital Storage Bus
If a Multiplexer Bus Driver on A3A5 has an incorrect output but all its inputs are good, the
multiplexer may be defective or there may be another bad driver/load on that data bit. If
replacing the multiplexer does not solve the problem, additional probing with a scope, current
tracer, or ohmmeter may be required to further isolate the bad node.
Test Program 2 is the same as Test Program 1 except that the Register RAMS are enabled.
This feedback path means that a low-order bit failure can make higher-order bits appear bad.
Therefore, it is best to probe beginning with bit 0 and then working up. If a register RAM
output appears incorrect, it may be due to either the RAM being defective, or the ALU input
being faulty. Grounding A3A5TP2 disables the RAM outputs, and the ALU input is verified
by manually grounding the RAM output.
2 A3A5
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