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The A3A7 Interface assembly contains several different circuits. Testing the Timing Generator
and Turn-on Control is probably best done with an oscilloscope to monitor the 8 MHz, 1
MHz, and 200 kHz outputs. The Qualifier Select circuit is checked, along with the A3A5 Data
Manipulator assembly, using Test Program 2. The Digital Storage address check uses the
self-check routine from the Al5 Controller in the RF Section.
The IOB interface circuitry is checked using the overall Test Program 4. The 50-wire
Analyzer Bus Interconnect cable W31 is removed so that the U16 and U17 Bus Drivers @ can
continually drive the IOB lines when A3A7TP8 is grounded. To check the data portion of
the interface, the jumper is moved to pin 7. If a fault is found in verifying the data at the P2
connector, the jumper El is opened before probing U3 to U9. This opens the feedback from
the Data Transfer Registers @ through the Bus Driver @ and back to the register @. If all
the Bus Driver @J outputs and the Digital Storage Bus Driver @ outputs are good when the
jumper is opened, then the fault is in the register corresponding to the bad bit detected at the
connector; that is, its IOB input is defective.
If the fault appears to be a bus fight problem (the Al5 Controller cannot properly drive the
IOB data lines until A3A7 is removed), then the problem might be that the Bus Driver @J
will not go into its high impedance output state. This can be determined by checking with an
oscilloscope the IOBO-11 lines with the Analyzer Bus Interconnect cable disconnected and
with A3A7TP8 not grounded. The lines should be "floating," usually between 1.4 V and 2 V.
With the Analyzer Bus Interconnect cable disconnected, AlA8TPl and AlA8TP2 must be
2 A3A7
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