Tandy 1000 SL Technical Reference Manual page 65

Address
D e s c r i p t i o n
FFE8-FFEB S y s t e m C o n t r o l R e g i s t e r s
FFE8 V i d e o C o n f i g u r a t i o n R e g i s t e r
B i t D e s c r i p t i o n
I 1
0 R e s e r v e d
' I C
.'
.
B i t 1-4 v i d e o Memory C o n f i g u r a t i o n
B i t
B i t B i t B i t
4 3
2
1
256K
E n a b l e A19 ~ 1 8 A17
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 1
1
Memory
S t a r t
0 0000
2 0 0 0 0
4 0 0 0 0
6 0000
8 0 0 0 0
B 0000
0 0 0 0 0
2 0 0 0 0
4 0 0 0 0
6 0 0 0 0
B
8 0 0 0
Memory
L e n g t h
128K
128K
128K
128K
128K
128K
256K
256K
256K
256K
256K
Memory
Range
0 0000-
1 FFFF
2 0000-
3 FFFF
4 0000-
5 FFFF
6 0000-
7 FFFF
8 0000-
9 FFFF
B 0000-
B FFFF
( 4 P a g e )
0 0000-
3 FFFF
2
0000-
5 FFFF
4
0000-
7 FFFF
6
0000-
9 FFFF
B
0000-
B FFFF
( 8 P a g e )
NOTE: To t u r n off o n - b o a r d V i d e o , b e sure P o r t AOH, Data
B i t
0 is
a "1"
a n d V i d e o A r r a y R e g i s t e r 3.
5
1 6 B i t CPU Memory = 1
6 R e s e r v e d
7 R e s e r v e d
54