Dma Controller - Tandy 1000 SL Technical Reference Manual

DMA Controller
The major components of the Direct Memory Access (DMA) circuit
consists of an 8237A-5 equivalent DMA controller, DMA control
logic, and a bi-directional address buffer internal to the
8079024 custom IC.
A DMA Operation. When a DMA operation is requested by software or
by a peripheral through a DREQ line, the 8079024 custom IC
initiates a Bus Hold Request to the 8086 CPU. The 8079024 custom
IC arbitrates the CPU Hold Request from the internal DMA
controller to the CPU.
when the CPU acknowledges the Hold request, the CPU control,
address, and data lines are tri-stated. The 8079024 custom IC
controls the direction and enables the memory or peripheral
address and data buses that correspond to the requested DMA
operation.
During the DMA operation, the 8237A-5 internal to the 8079024
custom IC acts as the bus master and, along with the associated
logic, generates all bus control signals and address and data
signals. The DMA transfers continue for the number of counts and
to the destination address that was previously programmed into
the DMA registers. See the device data sheet and the 1/0 map for
complete descriptions of the registers, their locations, and
their functions.
1/0 devices can extend the DMA bus cycle by controlling the
IOCHRDY signal of the expansion bus. Setup times must be observed
for IOCHRDY to be recognized.
RS-232 Serial Port Interface
The RS-232 Port is a single-channel, asynchronous communications
port. The heart of the serial port is the 8079021 custom IC (U40)
that functions as a serial data input/output interface. It
performs serial-to-parallel conversion on data characters
received from a peripheral device or modem and parallel-to-serial
conversion on data characters received from the CPU.
18