Tandy 1000 SL Technical Reference Manual page 436

3-4-7.
Check o f Erase Gate Delay
The purpose o f t h i s i t e m i s t o confirm t h e f u n c t i o n o f t h e c o n t r o l LSI.
T h i s
i t e m i s
n o t so important a s f a r a s t h e
FDD
o p e r a t e s normally.
(A)
Equipment
(1) SKA o r u s e r ' s system
( 2 ) O s c i l l o s c o p e ( n o t r e q u i r e d when an
SKA
i s used)
( 3 ) Work d i s k
(B-1)
Check procedure (General method)
(1) Use
two c h a n n e l s o f o s c i l l o s c o p e . Connect t h e t r i g g e r channel t o t h e
WRITE GATE i n t e r f a c e l i n e and t h e o t h e r channel t o TP2 (Erase g a t e
d e l a y ) on t h e
PCBA
MFD c o n t r o l .
O s c i l l o s c o p e range: For b o t h channels,
DC
mode, 5V, 100psec
(2) I n s t a l l a work d i s k and s t a r t t h e s p i n d l e motor.
(3) Execute t h e head loading.
(4) S e t t h e o s c i l l o s c o p e t o t h e n e g a t i v e t r i g g e r
(-)
mode. Make t h e
W R I T E GATE
s i g n a l TRUE
( w r i t e
conmand).
( 5 ) Confirm that "tl" (Erase
on
d e l a y ) i n Fig.3412 i s w i t h i n t h e following
range.
E r a s e on d e l a y , FD-S5BR/FR:
240
? ,
290psec
FD-SSGR: 200
%
24Opsec
( 6 ) S e t t h e o s c i l l o s c o p e t o t h e p o s i t i v e t r i g g e r
(+)
mode. Make t h e
WRITE
GATE
s i g n a l FALSE.
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3424
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