Tandy 1000 SL Technical Reference Manual page 183

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4C Characteristics (cont)
Ta
=
-10%
to
+7OoC.
VCC
=
+5 V f 5 % (vPD765An265A) and VCC
=
+5V
f10%
(uPD765A-217265A-2)
Urnb
1651,7265
766A-2,726S-2
TNt
Window cycle time
tWCY
4
4
pS
MFM=O,
5114"
2
2
ps
MFM=l. 5114"
2
2
pS
MFM=O.8"
Panmotor
Srnaol
Yin
Typ(i)
Mar
Yln
Typ(i]
Max
UnH
Condltlons
1
1
pS
MFM=1.8"
2
2
pS
MFM=O, 3'/2"(3)
1
1
ps
MFM=l, 3'/2"(3)
Window hold time to RDD
tRDW
15
15
ns
Window
hold
time from RDD
tWRO
15
15
ns
US0.1
holdtimetowlseekt
tu$
12
12
ps
8
MHz clock period(4)
R W I seek hold time to low
t
S
D
7
7
ps
8 MHz clock period(4)
-
currentldirectiont
Low
current I direction hold time to
1 0 s
1.0
1.0
ps
8 MHz clock period(4)
fault reset I step t
USo,
1 hold time from fault reset1
t g u
5.0
5.0
ps
8 MHz clock period(4)
steD
1
Step active time (high)
tSTP
6
7
8
6
7
8
ps
(Note4)
Step cycle time
tSC
33
(Note 2) (Note 2)
33
(Note
2)
(Note 2)
ps
(Note4)
Fault reset active time (high)
~ F R
8.0
10
8.0
10
ps
(Note4)
Write data width
~ W D O
10-50
10-50
ns
USo,
1 hold time after seek
tsu
15
15
ps
8 MHz clock period(4)
Seek hold time from DIR
tDS
30
30
ps
8
MHz clock period(4)
DIR hold time after step
tST0
24
24
ps
8 MHz clock period(4)
RD i M a y from DRO
~ M R
800
800
ns
8 MHz clock period(4)
WRJdelay from DRO
tMW
250
250
ns
8 MHz clock period(4)
Index pulse width
tlDX
4
4
@CY
-
-
WE or
RD
response time from DRO t
t M w
12
12
ps
8 MHz clock period(4)
Note:
(1)
Typical values for Tn =
25%
and nominal supply voltage.
(2) Under software control. The range is from
1
ms to 1 6 ms at
8 MHz
clock period, and
2
ms
lo
32
ms at
4 MHz
clock period.
(3) Sony Micro Floppydlsk
Fh"
drive.
(4)
Double thesa values for a
4 MHz
clock perlod.
Tlmlng Waveforms
Processor Read Operation
I
Processor Write Operation
6-8

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