Tandy 1000 SL Technical Reference Manual page 22

P o r t FFE9h
B i t ( s
1 D e f a u l t D e s c r i p t i o n
0
3 , 4
5
6
7
0
0
0
1
I n t e r n a l Memory W a i t States
0 = 0
w a i t s t a t e s
1 = 1 w a i t s t a t e s
E x t e r n a l Memory
W a i t
S t a t e s
0 0 =
0 1 =
1 0
=
1 1 =
I/O
C y c l e W a i t
0 0 =
0 1 =
1 0 =
1 1
=
DMA
C y c l e W a i t
o =
1 =
I n t e r n a l V i d e o
o =
1 =
OSCIN S e l e c t
o =
1 =
0
w a i t s t a t e s
1
w a i t s t a t e s
2
w a i t s t a t e s
3
w a i t s t a t e s
States
0
w a i t s t a t e s
1
w a i t s t a t e s
2
w a i t s t a t e s
3
w a i t s t a t e s
S t a t e s
W r i t e
S t r o b e
w a i t
S t a n d a r d 8137
write
S t r o b e
W a i t States
0 w a i t s t a t e s
1
w a i t s t a t e s
2 8 . 6 3 6 3 6 MHz
24 MHz
P r o g r a m m a b l e
W a i t
S t a t e C o n t r o l
A n o t h e r m e t h o d
i s c o n t r o l l e d by t h e d e v i c e b e i n g accessed, u s i n g
t h e IOCHRDY s i g n a l i n p u t
t o
t h e 8 0 7 9 0 2 4 c u s t o m I C . I f
a
d e v i c e
r e q u i r e s a d d i t i o n a l
w a i t s t a t e s
w i t h i n t h e b u s c y c l e , t h e
device
s h o u l d n e g a t e IOCHRDY
l o w
u n t i l
i t c a n s e r v i c e t h e b u s c y c l e .
A f t e r t h e r e q u i r e d number of
w a i t s t a t e s h a v e b e e n i n s e r t e d , t h e
d e v i c e s h o u l d
assert
IOCHRDY,
c a u s i n g t h e
READY
o u t p u t
of
t h e
8079024 c u s t o m I C
t o
b e a s s e r t e d h i g h , w h i c h
t e l l s t h e CPU
t o
t e r m i n a t e t h e c y c l e .
(Note:
IOCHRDY s h o u l d n o t b e h e l d
l o w f o r
l o n g e r t h a n 1 5 u s e c ) .
1 1