Tandy 1000 SL Technical Reference Manual page 198

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DMA mode, DB5 in the main status register is high.
Upon entering the result phase this bit gets cleared.
Reasons 1 and
4
do not require Sense Jnterrupt Status
commands. The interrupt is cleared by readinglwriting
data to the FDC. Interrupts caused by reasons 2 and 3
above may be uniquely identified with the aid of the
Sense Interrupt Status command. This command, when
issued, resets the Interrupt signal and, via bits5,6, and 7
of status register0, identifies the cause of the interrupt.
See table 9.
Table 9. InterruDt Status
0
1
1
Ready line changed state,
either wlarihr
1
0
0
Normal termination
of Seek
or
1
1
0
Abnormal termination
of
Seek
Recalibrate command
or
Recalibrate command
The Sense Interrupt Status command is used in con-
junction with the Seek and Recalibrate commands
which have no result phase. When the disk drive has
reached the desired head position the pPD765Al
pPD7265 will set the interrupt line true. The host CPU
must then issue a Sense Interrupt Status command to
determinetheactualcauseof the interrupt, which could
be seek end or a change in ready status from one of the
drives. A graphic example is shown in figure4.
Flgure 4.
Seek,
Recalibrate, and Sense Interrupt Status
Specify
The Specify command sets the initial values for each of
the three internal timers. The HUT (head unload time)
defines the time from the end of the execution phase of
one of the ReadlWrite commands to the head unload
state. This timer is programmable from 16 to 240ms in
increments
of
16 ms
(01
=
16 ms,
02
=
32 ms..
.
OFH
=
240ms).TheSRT(step rate time)defines the time
interval between adjacent step pulses. This timer is
programmable from 1 to 16ms in increments of l m s
(F
=
1 ms, E =2 ms, D
=
3 ms, etc.). The HLT (head load
time) defines the time between when the head load
signal goes high and the ReadlWrite operation starts.
This timer is programmable from 2 to 254ms in incre-
ments of 2ms (01=2ms, 02=4ms, 03=6ms
...
7F
=
254 ms).
The time intervals mentioned above are a direct func-
tion of the clock (CLK on pin 19). Times indicated above
are for an 8MHz clock; if the clock was reduced to
4 MHz (minifloppy application), then all time intervals
are increased by a factor of 2.
The choice of a DMA or non-DMA operation is made by
the ND (non-DMA) bit. When this bit is high (ND
=
1) the
non-DMA mode is selected, and when ND
= 0
the DMA
mode is selected.
Sense Drive Status
This command may be used by the processor whenever
it wishes to obtain the status of the FDDs. Status regis-
Seek (or Recalibrate) Command
- I -
Senw
Intsnupt Status Command
-Y
)cCommand P h a M ~ E x e c u t l o n Phaw A C o m m a n d Phaw+R.sult
P h a - 4
I
I
I
INT
I
I
I
I
I
I
I
I
E
s
-
RD
1
u
u :
U
u u
u u
I
I
I
-
I
WR
u
u
u
U
DIO
u
u
u
U
J L
JL
-
RBM
fl
n
n
n
n
n
t
t
t
t
t
t
6-23

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