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w
0237A
7
8
6
4
3 2
1 O C - B H N u n k r
1
Channel 0 has reached TC
1
1
1
1
Channel 0 request
1
Channel 1 request
1
Channel 2 request
Channel
1
has reached TC
Channel 2 has reached TC
Channel 3 has reached TC
1
Channel 3 request
231488-10
nels have pending DMA requests. Bits 0-3 are set
every time a TC is reached by that channel or an
external
is applied. These bits are cleared upon
Reset and on each Status Read. Bits 4-7 are set
whenever their corresponding channel is requesting
service.
Temporary Reglater-The
Temporary register is
used to hold data during memory-to-memory trans-
fers. Following the completion of the transfers, the
last word moved can
be
read by the microprocessor
in the Program Condition. The Temporary register
always contains the last byte transferred in the previ-
ous memory-to-memory operation, unless cleared
by a Reset.
Software Commands-These
are additional spe-
cial software commands which can be executed in
the Program Condition. They do not depend on any
specific bit pattern on the data bus. The three soft-
ware commands are:
Clear First/Last Fhp-Flw: This command must be
executed prior to writing or reading new address
or word count information to the 8237A. This ini-
tializes the flip-flop to a known state
so
that sub-
sequent accesses to register contents by the mi-
croprocessor will address upper and lower bytes
in the correct sequence.
Master Clear This software instruction has the
same effect as the hardware Reset. The Com-
mand, Status, Request, Temporary, and Internal
FirstILast Flip-Flop registers are cleared and the
Mask register is set. The 8237A will enter the Idle
cycle.
Clear Mask Register: This command clears the
mask bits of all four channels, enabling them to
accept DMA requests.
Figure 6 lists the address codes for the software
commands.
I
1
I
1
I
1
I
1
I
1
I
0
I
WflteAllMaskRegisterBits
I
Figure 6. Software Command Codes
2-242
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