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S3C8248/C8245/P8245/C8247/C8249/P8249
SYSTEM MODE REGISTER (SYM)
The system mode register, SYM (set 1, DEH), is used to globally enable and disable interrupt processing and to
control fast interrupt processing (see Figure 5-5).
A reset clears SYM.1, and SYM.0 to "0". The 3-bit value for fast interrupt level selection, SYM.4–SYM.2, is
undetermined.
The instructions EI and DI enable and disable global interrupt processing, respectively, by modifying the bit 0
value of the SYM register. In order to enable interrupt processing an Enable Interrupt (EI) instruction must be
included in the initialization routine, which follows a reset operation. Although you can manipulate SYM.0 directly
to enable and disable interrupts during the normal operation, it is recommended to use the EI and DI instructions
for this purpose.
MSB
Not used for the S3C8248/C8245/C8247/C8249
System Mode Register (SYM)
DEH, Set 1, R/W
.7
.6
.5
.4
Fast interrupt level
selection bits:
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Figure 5-5. System Mode Register (SYM)
.3
.2
.1
.0
Global interrupt enable bit:
0 = Disable all interrupts processing
1 = Enable all interrupts processing
Fast interrupt enable bit:
0 = Disable fast interrupts processing
IRQ0
1 = Enable fast interrupts processing
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
INTERRUPT STRUCTURE
LSB
5-9
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