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Samsung S3C8248 User Manual page 52

8-bit cmos

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S3C8248/C8245/P8245/C8247/C8249/P8249
CLKCON
— System Clock Control Register
Bit Identifier
RESET Value
RESET
Read/Write
Addressing Mode
.7–.5
.4–.3
.2–.0
NOTE: After a reset, the slowest clock (divided by 16) is selected as the system clock. To select faster clock speeds, load
the appropriate values to CLKCON.3 and CLKCON.4.
.7
.6
0
0
Register addressing mode only
Not used for the S3C8248/C8245/C8247/C8249
CPU Clock (System Clock) Selection Bits
0
0
fxx/16
0
1
fxx/8
1
0
fxx/2
1
1
fxx
Not used for the S3C8248/C8245/C8247/C8249
.5
.4
.3
0
0
0
R/W
R/W
(note)
CONTROL REGISTER
D4H
.2
.1
0
0
Set 1
.0
0
4-7

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