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Samsung S3C8248 User Manual page 282

8-bit cmos

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S3C8248/C8245/P8245/C8247/C8249/P8249
°
°
(T
= -40
C to +85
C, V
A
Parameter
Input
capacitance
Output
capacitance
I/O capacitance
°
°
(T
= -40
C to + 85
C)
A
Parameter
Data retention
supply voltage
Data retention
supply current
V
DD
RESET
NOTE:
Table 19-5. Input/Output Capacitance
= 0 V )
DD
Symbol
Conditions
C
f = 1 MHz; unmeasured pins
IN
are returned to V
C
OUT
C
IO
Table 19-6. Data Retention Supply Voltage in Stop Mode
Symbol
Conditions
V
DDDR
I
V
= 2 V
DDDR
DDDR
Execution of
STOP Instrction
t
is the same as 4096 x 16 x 1/fxx
WAIT
Figure 19-3. Stop Mode Release Timing Initiated by RESET
SS
Stop Mode
Data Retention Mode
V
DDDR
0.2 V
Min
Typ
Min
Typ
2
RESET
Oscillation
Occurs
Stabilization
Time
t
DD
WAIT
ELECTRICAL DATA
Max
Unit
10
pF
Max
Unit
5.5
V
3
uA
Normal
Operating Mode
19-7

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