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Samsung S3C8248 User Manual page 269

8-bit cmos

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SERIAL I/O INTERFACE
SIO CONTROL REGISTER (SIOCON)
The control register for serial I/O interface module, SIOCON, is located at F0H in set 1, bank 0. It has the control
settings for SIO module.
— Clock source selection (internal or external) for shift clock
— Interrupt enable
— Edge selection for shift operation
— Clear 3-bit counter and start shift operation
— Shift operation (transmit) enable
— Mode selection (transmit/receive or receive-only)
— Data direction selection (MSB first or LSB first)
A reset clears the SIOCON value to "00H". This configures the corresponding module with an internal clock
source at the SCK, selects receive-only operating mode, and clears the 3-bit counter. The data shift operation
and the interrupt are disabled. The selected data direction is MSB-first.
SIO shift clock selection bit:
0 = Internal clock (P.S Clock)
1 = External clock (SCK)
Data direction control bit:
0 = MSB-first mode
1 = LSB-first mode
Shift clock edge selection bit:
0 = t
at falling edeges, rx at rising edges.
X
1 = t
at rising edeges, rx at falling edges.
X
16-2
Serial I/O Module Control Registers
SIOCON: F0H, Set 1, Bank 0, R/W, RESET; 00H
MSB
.7
.6
.5
SIO mode selection bit:
0 = Receive only mode
1 = Transmit/receive mode
Figure 16-1. Serial I/O Module Control Registers (SIOCON)
S3C8248/C8245/P8245/C8247/C8249/P8249
.4
.3
.2
.1
SIO interrupt enable bit:
0 = Disable SIO interrupt
1 = Enable SIO interrupt
SIO shift operation enable bit:
0 = Disable shifter and clock counter
1 = Enable shifter and clock counter
SIO counter clear and shift start bit:
0 = No action
1 = Clear 3-bit counter and start shifting
.0
LSB
SIO interrupt pending bit:
0 = No interrupt pending
0 = Clear pending condition
(when write)
1 = Interrupt is pending

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