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S3C8248/C8245/P8245/C8247/C8249/P8249
PRIME REGISTER SPACE
The lower 192 bytes (00H–BFH) of the S3C8248/C8245/C8247/C8249's four or two 256-byte register pages is
called prime register area. Prime registers can be accessed using any of the seven addressing modes
(see Chapter 3, "Addressing Modes.")
The prime register area on page 0 is immediately addressable following a reset. In order to address prime
registers on pages 0, 1, 2, 3, or 4 you must set the register page pointer (PP) to the appropriate source and
destination values.
Bank 0
FFH
FCH
E0H
D0H
C0H
CPU and system control
General-purpose
Peripheral and I/O
LCD data register
Figure 2-4. Set 1, Set 2, Prime Area Register, and LCD Data Register Map
Set 1
FFH
Bank 1
C0H
BFH
00H
FFH
Page 3
FFH
Page 2
Set 2
FFH
Page 1
Set 2
Page 0
Set 2
Set 2
Page 0
Prime
Space
ADDRESS SPACES
Page 4
0FH
LCD Data
Register Area
00H
2-7
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