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LCD CONTROLLER/DRIVER
LCD CONTROL REGISTER (LCON), D0H
LCON Bit
Setting
LCON.7
0
1
LCON.6
0
1
LCON.5
0
1
LCON.4
0
1
LCON.3
0
LCON.2
0
1
LCON.1
0
1
LCON.0
0
1
LCON.0
LMOD.3
0
x
1
0
1
NOTE: "X" means don't care.
14-4
Table 14-1. LCD Control Register (LCON) Organization
P5.4–P5.7 I/O is selected
SEG28–SEG31 is selected, P5.4–P5.7 I/O is disabled
P5.0–P5.3 I/O is selected
SEG24–SEG27 is selected, P5.0–P5.3 I/O is disabled
P4.4–P4.7 I/O is selected
SEG20–SEG23 is selected, P4.4–P4.7 I/O is disabled
P4.0–P4.3 I/O is selected
SEG16–SEG19 is selected, P4.0–P4.3 I/O is disabled
This bit is used for internal testing only; always logic zero.
Enable LCD initial circuit (internal bias voltage).
Disable LCD initial circuit for external LCD dividing resistors(external bias voltage).
Stop voltage booster(clock stop and cut off current charge path)
Run voltage booster(clock run and turn on current charge path)
LCD output low; turn display off, COM and SEG output Low
Cut off voltage booster (Booster clock disable).
COM and SEG output is in display mode; turn display on.
Table 14-2. Relationship of LCON.0 and LMOD.3 Bit Settings
COM0–COM3
Output low; LCD display off
Output low; LCD display off
COM output corresponds to display mode
S3C8248/C8245/P8245/C8247/C8249/P8249
Description
SEG0–SEG31
Output low; LCD display off
Output low; LCD display off
SEG output corresponds to display mode
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