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CONTROL REGISTERS
IRQ
— Interrupt Request Register
Bit Identifier
RESET Value
RESET
Read/Write
Addressing Mode
.7
.6
.5
.4
.3
.2
.1
.0
4-14
.7
.6
0
0
R
R
Register addressing mode only
Level 7 (IRQ7) Request Pending Bit; External Interrupts P0.4–0.7
0
Not pending
1
Pending
Level 6 (IRQ6) Request Pending Bit; External Interrupts P0.0–0.3
0
Not pending
1
Pending
Level 5 (IRQ5) Request Pending Bit; Watch Timer Overflow
0
Not pending
1
Pending
Level 4 (IRQ4) Request Pending Bit; SIO Interrupt
0
Not pending
1
Pending
Level 3 (IRQ3) Request Pending Bit; Timer 1 Match/Capture or Overflow
0
Not pending
1
Pending
Level 2 (IRQ2) Request Pending Bit; Timer 0 Match
0
Not pending
1
Pending
Level 1 (IRQ1) Request Pending Bit; Timer B Match
0
Not pending
1
Pending
Level 0 (IRQ0) Request Pending Bit; Timer A Match/Capture or Overflow
0
Not pending
1
Pending
S3C8248/C8245/P8245/C8247/C8249/P8249
.5
.4
.3
0
0
0
R
R
R
DCH
.2
.1
0
0
R
R
Set 1
.0
0
R
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